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PIC16LC63A-04 Datasheet, PDF (102/184 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D Converter | |||
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PIC16C63A/65B/73B/74B
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test f, Skip if Set
[label] BTFSS f,b
0 ⤠f ⤠127
0â¤b<7
skip if (f<b>) = 1
None
If bit âbâ in register âfâ is â0â, the next
instruction is executed.
If bit âbâ is â1â, then the next instruction
is discarded and a NOP is executed
instead making this a 2TCY instruction.
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear f
[label] CLRF f
0 ⤠f ⤠127
00h â (f)
1âZ
Z
The contents of register âfâ are cleared
and the Z bit is set.
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Test, Skip if Clear
[label] BTFSC f,b
0 ⤠f ⤠127
0â¤bâ¤7
skip if (f<b>) = 0
None
If bit âbâ in register âfâ is â1â, the next
instruction is executed.
If bit âbâ, in register âfâ, is â0â, the next
instruction is discarded, and a NOP is
executed instead, making this a 2 TCY
instruction.
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h â (W)
1âZ
Z
W register is cleared. Zero bit (Z) is
set.
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
Call Subroutine
[ label ] CALL k
0 ⤠k ⤠2047
(PC)+ 1â TOS,
k â PC<10:0>,
(PCLATH<4:3>) â PC<12:11>
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle
instruction.
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear Watchdog Timer
[ label ] CLRWDT
None
00h â WDT
0 â WDT prescaler,
1 â TO
1 â PD
TO, PD
CLRWDT instruction resets the Watch-
dog Timer. It also resets the prescaler
of the WDT. Status bits TO and PD
are set.
DS30605C-page 102
 2000 Microchip Technology Inc.
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