PIC32MX795F512L-80IPT Datasheet, PDF (8/68 Pages) Microchip Technology – PIC32 Flash Programming Specification

PIC32
5.0 EJTAG vs. ICSP
Programming is accomplished through the EJTAG
module in the CPU core. EJTAG is connected to either
the full set of JTAG pins, or a reduced 2-wire to 4-wire
EJTAG interface for ICSP mode. In both modes,
programming of the PIC32 Flash memory is
accomplished through the ETAP controller. The TAP
Controller uses the TMS pin to determine if Instruction
or Data registers should be accessed in the shift path
between TDI and TDO (see Figure 5-1).
FIGURE 5-1:
TAP CONTROLLER
TMS
Tap Controller
The basic concept of EJTAG that is used for
programming is the use of a special memory area
called DMSEG (0xFF200000 to 0xFF2FFFFF), which
is only available when the processor is running in
Debug mode. All instructions are serially shifted into an
internal buffer, and then loaded into the Instruction
register and executed by the CPU. Instructions are fed
through the ETAP state machine in 32-bit groups.
TCK
TDO
TDI
Instruction, Data and Control Registers
DS61145L-page 8
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