PIC32MX795F512L-80IPT Datasheet, PDF (44/68 Pages) Microchip Technology – PIC32 Flash Programming Specification

PIC32
17.0 CHECKSUM
17.1 Theory
The checksum is calculated as the 32-bit summation of
all bytes (8-bit quantities) in program Flash, boot Flash
(except device Configuration Words), the Device ID
register with applicable mask, and the device Configu-
ration Words with applicable masks. Next, the 2’s
complement of the summation is calculated. This final
32-bit number is presented as the checksum.
17.2 Mask Values
The mask value of a device Configuration is calculated
by setting all the unimplemented bits to ‘0’ and all the
implemented bits to ‘1’.
For example, Register 17-1 shows the DEVCFG0 reg-
ister of the PIC32MX360F512L device. The mask value
for this register is:
mask_value_devcfg0 = 0x110FF00B
Table 17-1 lists the mask values of the four device Con-
figuration registers and Device ID registers to be used
in the checksum calculations.
REGISTER 17-1: DEVCFG0 REGISTER OF PIC32MX360F512L
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3
31:24
23:16
15:8
7:0
r-0
—
r-1
—
R/P-1
PWP15
r-1
—
r-1
—
r-1
—
R/P-1
PWP14
r-1
—
r-1
—
r-1
—
R/P-1
PWP13
r-1
—
R/P-1
CP
r-1
—
R/P-1
PWP12
r-1
—
r-1
—
R/P-1
PWP19
r-1
—
R/P-1
ICESEL
Bit
26/18/10/2
r-1
—
R/P-1
PWP18
r-1
—
r-1
—
Bit
Bit
25/17/9/1 24/16/8/0
r-1
R/P-1
—
BWP
R/P-1
R/P-1
PWP17 PWP16
r-1
r-1
—
—
R/P-1
R/P-1
DEBUG<1:0>
Legend:
R = Readable bit
-n = Value at POR
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
r = Reserved bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
DS61145L-page 44
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