PIC32MX795F512L-80IPT Datasheet, PDF (30/68 Pages) Microchip Technology – PIC32 Flash Programming Specification

PIC32
14.0 VERIFY DEVICE MEMORY
The verify step involves reading back the code memory
space and comparing it against the copy held in the
programmer’s buffer. The Configuration registers are
verified with the rest of the code.
Note:
Because the Configuration registers
include the device code protection bit,
code memory should be verified immedi-
ately after writing (if code protection is
enabled). This is because the device will
not be readable or verifiable if a device
Reset occurs after the code-protect bit
has been cleared.
14.1 Verifying Memory with the PE
Memory verify is performed using the GET_CRC
command, as shown in Table 16-2.
FIGURE 14-1:
VERIFYING MEMORY
WITH THE PE
Issue Verify Command
Receive Response
The following steps are required to verify memory using
the PE:
1. XferFastData (GET_CRC).
2. XferFastData (start_Address).
3. XferFastData (length).
4. valCkSum = XferFastData (32’h0x00).
Verify that valCkSum matches the checksum of the
copy held in the programmer’s buffer.
14.2 Verifying Memory without the PE
Reading from Flash memory is performed by executing
a series of read accesses from the Fastdata register.
Table 19-4 shows the EJTAG programming details,
including the address and op code data for performing
processor access operations.
FIGURE 14-2:
VERIFYING MEMORY
WITHOUT THE PE
Read Memory Location
Verify Location
No
Done
The following steps are required to verify memory:
1. XferInstruction (op code).
2. Repeat Step 1 until the last instruction is
transferred to the CPU.
3. Verify that valRead matches the copy held in the
programmer’s buffer.
4. Repeat Steps 1-3 for each memory location.
TABLE 14-1: VERIFY DEVICE OP CODES
Op code Instruction
Step 1: Initialize some constants.
3c13ff20 lui $s3, 0xFF20
Step 2: Read memory Location.
3c08<ADDR> lui $t0,<FLASH_WORD_ADDR(31:16)>
3508<ADDR> ori $t0,<FLASH_WORD_ADDR(15:0)>
Step 3: Write to Fastdata location.
8d090000
ae690000
lw $t1, 0($t0)
sw $t1, 0($s3)
Step 4: Read data from Fastdata register 0xFF200000.
Step 5: Repeat Steps 2-4 until all configuration locations
are read.
DS61145L-page 30
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