PIC32MX795F512L-80IPT Datasheet, PDF (18/68 Pages) Microchip Technology – PIC32 Flash Programming Specification

PIC32
6.4 XferFastData Pseudo Operation
Format:
oData = XferFastData (iData)
Purpose:
To quickly send 32 bits of data in/out of the device.
Description (in sequence):
1. The TMS Header is clocked into the device to
select the Shift DR state.
Note:
For 2-wire (4-phase) – on the last clock,
the oPrAcc bit is shifted out on TDO while
clocking in the TMS Header. If the value of
oPrAcc is not ‘1’, the whole operation
must be repeated.
2. The input value of the PrAcc bit, which is ‘0’, is
clocked in.
Note:
For 2-wire (4-phase) – the TDO during this
operation will be the LSb of output data.
The rest of the 31 bits of the input data are
clocked in and the 31 bits of output data
are clocked out. For the last bit of the input
data, the TMS Footer = 1 is set.
3. TMS Footer = 10 is clocked in to return the TAP
controller to the Run/Test Idle state.
Restrictions:
The SendCommand (ETAP_FASTDATA) must be sent
first to select the Fastdata register, as shown in
Example 6-1. See Table 19-4 for a detailed descriptions
of commands.
Note:
The 2-phase XferData is only used when
talking to the PE. See Section 16.0 “The
Programming Executive” for more
information.
EXAMPLE 6-1: SendCommand
// Select the Fastdata Register
SendCommand(ETAP_FASTDATA)
// Send/Receive 32-bit Data
oData = XferFastData(32’h0x12)
FIGURE 6-7:
XferFastData 4-WIRE
TMS Header = 100
PrAcc
Data (32’h0x12) Data (MSb) + TMS = 1 TMS Footer = 10
TCK
‘1’
‘0’
‘0’
TMS
TDI
TDO
‘0’
iLSb
‘1’
oLSb
‘1’
‘1’
‘0’
iMSb
oMSb
FIGURE 6-8:
XferFastData 2-WIRE (2-phase)
TMS Header = 100
PrAcc
Data (32’h0x12)
Data (MSb) TMS = 1 TMS Footer = 10
PGECx
PGEDx
TDI = X TMS = 1
TDI = 0 TMS = 0
TDI =
iLSb
TMS = 0
TDI =
MSb
TMS = 1 TDI = X TMS = 1
DS61145L-page 18
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