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PIC18F23K20 Datasheet, PDF (61/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2XK20/4XK20
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
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PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
xxxx xxxx
--00 0000
--00 0qqq
0-00 0000
xxxx xxxx
xxxx xxxx
uuuu uuuu
uuuu uuuu
--00 0000
--00 0qqq
0-00 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
--uu uuuu
u-uu uuuu
uuuu uuuu
uuuu uuuu
CCP1CON
CCPR2H
CCPR2L
CCP2CON
PSTRCON
BAUDCTL
PWM1CON
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PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
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0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
---0 0001
0100 0-00
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
--00 0000
---0 0001
0100 0-00
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
---u uuuu
uuuu u-uu
uuuu uuuu
ECCP1AS
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
CVRCON
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
CVRCON2
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00-- ----
00-- ----
uu-- ----
TMR3H
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xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR3L
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xxxx xxxx
uuuu uuuu
uuuu uuuu
T3CON
PIC18F2XK20 PIC18F4XK20
0000 0000
uuuu uuuu
uuuu uuuu
SPBRGH
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
SPBRG
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
RCREG
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
TXREG
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
TXSTA
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0000 0010
0000 0010
uuuu uuuu
RCSTA
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0000 000x
0000 000x
uuuu uuuu
EEADR
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
EEADRH
PIC18F26K20 PIC18F46K20
---- --00
---- --00
---- --uu
EEDATA
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
EECON2
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
0000 0000
EECON1
PIC18F2XK20 PIC18F4XK20
xx-0 x000
uu-0 u000
uu-0 u000
Legend:
Note 1:
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
© 2007 Microchip Technology Inc.
Advance Information
DS41303B-page 59