PIC18F23K20 Datasheet, PDF (167/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2XK20/4XK20
16.0 ENHANCED
CAPTURE/COMPARE/PWM
(ECCP) MODULE
CCP1 is implemented as a standard CCP module with
enhanced PWM capabilities. These include:
• Provision for 2 or 4 output channels
• Output steering
• Programmable polarity
• Programmable dead-band control
• Automatic shutdown and restart.
The enhanced features are discussed in detail in
Section 16.4 “PWM (Enhanced Mode)”. Capture,
Compare and single-output PWM functions of the
ECCP module are the same as described for the
standard CCP module.
The control register for the enhanced CCP module is
shown in Register 16-1. It differs from the CCP2CON
register in that the two Most Significant bits are
implemented to control PWM functionality.
REGISTER 16-1: CCP1CON: ENHANCED CAPTURE/COMPARE/PWM CONTROL REGISTER
R/W-0
P1M1
bit 7
R/W-0
P1M0
R/W-0
DC1B1
R/W-0
DC1B0
R/W-0
CCP1M3
R/W-0
CCP1M2
R/W-0
CCP1M1
R/W-0
CCP1M0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3-0
P1M<1:0>: Enhanced PWM Output Configuration bits
If CCP1M<3:2> = 00, 01, 10:
xx = P1A assigned as Capture/Compare input/output; P1B, P1C, P1D assigned as port pins
If CCP1M<3:2> = 11:
00 = Single output: P1A, P1B, P1C and P1D controlled by steering (See Section 16.4.7 “Pulse Steering
Mode”).
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
DC1B<1:0>: PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found in
CCPR1L.
CCP1M<3:0>: Enhanced CCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Reserved
0010 = Compare mode, toggle output on match
0011 = Capture mode
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, initialize CCP1 pin low, set output on compare match (set CCP1IF)
1001 = Compare mode, initialize CCP1 pin high, clear output on compare match (set CCP1IF)
1010 = Compare mode, generate software interrupt only, CCP1 pin reverts to I/O state
1011 = Compare mode, trigger special event (ECCP resets TMR1 or TMR3, sets CC1IF bit)
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
© 2007 Microchip Technology Inc.
Advance Information
DS41303B-page 165