PIC18F23K20 Datasheet, PDF (60/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2XK20/4XK20
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
FSR1H
PIC18F2XK20 PIC18F4XK20
---- 0000
---- 0000
---- uuuu
FSR1L
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
BSR
PIC18F2XK20 PIC18F4XK20
---- 0000
---- 0000
---- uuuu
INDF2
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTINC2
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
POSTDEC2
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PREINC2
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
PLUSW2
PIC18F2XK20 PIC18F4XK20
N/A
N/A
N/A
FSR2H
PIC18F2XK20 PIC18F4XK20
---- 0000
---- 0000
---- uuuu
FSR2L
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
STATUS
PIC18F2XK20 PIC18F4XK20
---x xxxx
---u uuuu
---u uuuu
TMR0H
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
TMR0L
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
T0CON
PIC18F2XK20 PIC18F4XK20
1111 1111
1111 1111
uuuu uuuu
OSCCON
PIC18F2XK20 PIC18F4XK20
0011 qq00
0011 qq00
uuuu uuuu
HLVDCON
PIC18F2XK20 PIC18F4XK20
0-00 0101
0-00 0101
u-uu uuuu
WDTCON
RCON⁽⁴⁾
PIC18F2XK20 PIC18F4XK20
PIC18F2XK20 PIC18F4XK20
---- ---0
0q-1 11q0
---- ---0
0q-q qquu
---- ---u
uq-u qquu
TMR1H
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1L
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
PIC18F2XK20 PIC18F4XK20
0000 0000
u0uu uuuu
uuuu uuuu
TMR2
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
PR2
PIC18F2XK20 PIC18F4XK20
1111 1111
1111 1111
1111 1111
T2CON
PIC18F2XK20 PIC18F4XK20
-000 0000
-000 0000
-uuu uuuu
SSPBUF
PIC18F2XK20 PIC18F4XK20
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSPADD
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
SSPCON1
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
SSPCON2
PIC18F2XK20 PIC18F4XK20
0000 0000
0000 0000
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
5:
6:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read ‘0’.
All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.
DS41303B-page 58
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© 2007 Microchip Technology Inc.