PIC18F23K20 Datasheet, PDF (24/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2XK20/4XK20
TABLE 1-3: PIC18F4XK20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
RD0/PSP0
RD0
PSP0
PORTD is a bidirectional I/O port or a Parallel Slave
Port (PSP) for interfacing to a microprocessor port.
These pins have TTL input buffers when PSP module
is enabled.
19 38 38
I/O ST
I/O TTL
Digital I/O
Parallel Slave Port data
RD1/PSP1
RD1
PSP1
20 39 39
I/O ST
I/O TTL
Digital I/O
Parallel Slave Port data
RD2/PSP2
RD2
PSP2
21 40 40
I/O ST
I/O TTL
Digital I/O
Parallel Slave Port data
RD3/PSP3
RD3
PSP3
22 41 41
I/O ST
I/O TTL
Digital I/O
Parallel Slave Port data
RD4/PSP4
RD4
PSP4
27 2
2
I/O ST
Digital I/O
I/O TTL Parallel Slave Port data
RD5/PSP5/P1B
RD5
PSP5
P1B
28 3
3
I/O ST
Digital I/O
I/O TTL Parallel Slave Port data
O
—
Enhanced CCP1 output
RD6/PSP6/P1C
RD6
PSP6
P1C
29 4
4
I/O ST
Digital I/O
I/O TTL Parallel Slave Port data
O
—
Enhanced CCP1 output
RD7/PSP7/P1D
RD7
PSP7
P1D
30 5
5
I/O ST
Digital I/O
I/O TTL Parallel Slave Port data
O
—
Enhanced CCP1 output
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit CCP2MX is set.
2: Alternate assignment for CCP2 when Configuration bit CCP2MX is cleared.
DS41303B-page 22
Advance Information
© 2007 Microchip Technology Inc.