PIC18F23K20 Datasheet, PDF (414/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2XK20/4XK20
OSCTUNE (Oscillator Tuning) ................................... 31
PIE1 (Peripheral Interrupt Enable 1) ........................ 108
PIE2 (Peripheral Interrupt Enable 2) ........................ 109
PIR1 (Peripheral Interrupt Request 1) ..................... 106
PIR2 (Peripheral Interrupt Request 2) ..................... 107
PSTRCON (Pulse Steering Control) ........................ 177
PWM1CON (Enhanced PWM Control) .................... 176
RCON (Reset Control) ....................................... 50, 112
RCON (Reset control) .............................................. 112
RCSTA (Receive Status and Control) ...................... 233
SLRCON (PORT Slew Rate Control) ....................... 132
SSPCON1 (MSSP Control 1, I²C Mode) ................. 194
SSPCON1 (MSSP Control 1, SPI Mode) ................. 185
SSPCON2 (MSSP Control 2, I²C Mode) ................. 195
SSPMSK (SSP Mask) .............................................. 202
SSPSTAT (MSSP Status, SPI Mode) .............. 184, 193
STATUS ..................................................................... 79
STKPTR (Stack Pointer) ............................................ 65
T0CON (Timer0 Control) .......................................... 135
T1CON (Timer1 Control) .......................................... 139
T2CON (Timer2 Control) .......................................... 145
T3CON (Timer3 Control) .......................................... 147
TRISE (PORTE/PSP Control) .................................. 128
TXSTA (Transmit Status and Control) ..................... 232
WDTCON (Watchdog Timer Control) ....................... 293
RESET ............................................................................. 329
Reset State of Registers .................................................... 56
Resets ........................................................................ 49, 283
Brown-out Reset (BOR) ........................................... 283
Oscillator Start-up Timer (OST) ............................... 283
Power-on Reset (POR) ............................................ 283
Power-up Timer (PWRT) ......................................... 283
RETFIE ............................................................................ 330
RETLW ............................................................................. 330
RETURN .......................................................................... 331
Return Address Stack ........................................................ 64
Return Stack Pointer (STKPTR) ........................................ 65
Revision History ............................................................... 397
RLCF ................................................................................ 331
RLNCF ............................................................................. 332
RRCF ............................................................................... 332
RRNCF ............................................................................. 333
S
SCK .................................................................................. 183
SDI ................................................................................... 183
SDO ................................................................................. 183
SEC_IDLE Mode ................................................................ 45
SEC_RUN Mode ................................................................ 42
Serial Clock, SCK ............................................................. 183
Serial Data In (SDI) .......................................................... 183
Serial Data Out (SDO) ..................................................... 183
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 333
Shoot-through Current ..................................................... 175
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 183
Slave Select Synchronization ........................................... 189
SLEEP .............................................................................. 334
Sleep
OSC1 and OSC2 Pin States ...................................... 34
Sleep Mode ........................................................................ 43
SLRCON Register ............................................................ 132
Software Simulator (MPLAB SIM) .................................... 350
SPBRG ............................................................................. 235
SPBRGH .......................................................................... 235
Special Event Trigger ...................................................... 253
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 283
Special Function Registers ................................................ 74
Map ............................................................................ 75
SPI Mode (MSSP)
Associated Registers ............................................... 191
Bus Mode Compatibility ........................................... 191
Effects of a Reset .................................................... 191
Enabling SPI I/O ...................................................... 187
Master Mode ............................................................ 188
Master/Slave Connection ......................................... 187
Operation ................................................................. 186
Operation in Power Managed Modes ...................... 191
Serial Clock .............................................................. 183
Serial Data In ........................................................... 183
Serial Data Out ........................................................ 183
Slave Mode .............................................................. 189
Slave Select ............................................................. 183
Slave Select Synchronization .................................. 189
SPI Clock ................................................................. 188
Typical Connection .................................................. 187
SS .................................................................................... 183
SSPCON1 Register ................................................. 185, 194
SSPCON2 Register ......................................................... 195
SSPMSK Register ........................................................... 202
SSPOV ............................................................................ 214
SSPOV Status Flag ......................................................... 214
SSPSTAT Register .................................................. 184, 193
R/W Bit ............................................................ 196, 197
Stack Full/Underflow Resets .............................................. 66
Standard Instructions ....................................................... 299
STATUS Register .............................................................. 79
STKPTR Register .............................................................. 65
SUBFSR .......................................................................... 345
SUBFWB ......................................................................... 334
SUBLW ............................................................................ 335
SUBULNK ........................................................................ 345
SUBWF ............................................................................ 335
SUBWFB ......................................................................... 336
SWAPF ............................................................................ 336
T
T0CON Register .............................................................. 135
T1CON Register .............................................................. 139
T2CON Register .............................................................. 145
T3CON Register .............................................................. 147
Table Pointer Operations (table) ........................................ 88
Table Reads/Table Writes ................................................. 66
TBLRD ............................................................................. 337
TBLWT ............................................................................. 338
Time-out in Various Situations (table) ................................ 53
Timer0 .............................................................................. 135
Associated Registers ............................................... 137
Operation ................................................................. 136
Overflow Interrupt .................................................... 137
Prescaler ................................................................. 137
Prescaler Assignment (PSA Bit) .............................. 137
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 137
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 136
Source Edge Select (T0SE Bit) ............................... 136
Source Select (T0CS Bit) ......................................... 136
Switching Prescaler Assignment ............................. 137
DS41303B-page 412
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