PIC18F23K20 Datasheet, PDF (169/420 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2XK20/4XK20
16.4 PWM (Enhanced Mode)
The Enhanced PWM Mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
Note:
The PWM Enhanced mode is available on
the Enhanced Capture/Compare/PWM
module (CCP1) only.
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 16-1 shows the pin assignments for each
Enhanced PWM mode.
Figure 16-1 shows an example of a simplified block
diagram of the Enhanced PWM module.
Note:
To prevent the generation of an
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
FIGURE 16-1:
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Duty Cycle Registers
CCPR1L
DC1B<1:0>
CCPR1H (Slave)
Comparator
R
TMR2
(1)
S
Comparator
PR2
Clear Timer2,
toggle PWM pin and
latch duty cycle
P1M<1:0>
CCP1M<3:0>
2
4
CCP1/P1A
TRIS
P1B
Q
Output
Controller
TRIS
P1C
TRIS
P1D
TRIS
PWM1CON
CCP1/P1A
P1B
P1C
P1D
Note 1: The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit
time base.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
2: Clearing the CCPxCON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
TABLE 16-1: EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
ECCP Mode
P1M<1:0>
CCP1/P1A
P1B
P1C
Single
00
Yes⁽¹⁾
Yes⁽¹⁾
Yes⁽¹⁾
Half-Bridge
10
Yes
Yes
No
Full-Bridge, Forward
01
Yes
Yes
Yes
Full-Bridge, Reverse
11
Yes
Yes
Yes
Note 1: Outputs are enabled by pulse steering in Single mode. See Register 16-4.
P1D
Yes⁽¹⁾
No
Yes
Yes
© 2007 Microchip Technology Inc.
Advance Information
DS41303B-page 167