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PIC18F2455_09 Datasheet, PDF (55/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology
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PIC18F2455/2550/4455/4550
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
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2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
N/A
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
N/A
---0 uuuu(1)
uuuu uuuu(1)
uuuu uuuu(1)
uu-u uuuu(1)
---u uuuu
uuuu uuuu
PC + 2(3)
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(2)
uuuu -u-u(2)
uu-u u-uu(2)
N/A
POSTINC0 2455 2550 4455 4550
N/A
N/A
N/A
POSTDEC0 2455 2550 4455 4550
N/A
N/A
N/A
PREINC0
2455 2550 4455 4550
N/A
N/A
N/A
PLUSW0
2455 2550 4455 4550
N/A
N/A
N/A
FSR0H
FSR0L
WREG
INDF1
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2455 2550 4455 4550
2455 2550 4455 4550
2455 2550 4455 4550
---- 0000
xxxx xxxx
xxxx xxxx
N/A
---- 0000
uuuu uuuu
uuuu uuuu
N/A
---- uuuu
uuuu uuuu
uuuu uuuu
N/A
POSTINC1 2455 2550 4455 4550
N/A
N/A
N/A
POSTDEC1 2455 2550 4455 4550
N/A
N/A
N/A
PREINC1
2455 2550 4455 4550
N/A
N/A
N/A
PLUSW1
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N/A
N/A
N/A
FSR1H
FSR1L
BSR
Legend:
Note 1:
2:
3:
4:
5:
2455 2550 4455 4550
---- 0000
---- 0000
---- uuuu
2455 2550 4455 4550
xxxx xxxx
uuuu uuuu
uuuu uuuu
2455 2550 4455 4550
---- 0000
---- 0000
---- uuuu
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
See Table 4-3 for Reset value for specific condition.
PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read ‘0’.
© 2009 Microchip Technology Inc.
DS39632E-page 53
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