PIC18F2455_09 Datasheet, PDF (426/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
C
C Compilers
MPLAB C18 ............................................................. 364
MPLAB C30 ............................................................. 364
CALL ................................................................................ 328
CALLW ............................................................................. 357
Capture (CCP Module) ..................................................... 145
CCP Pin Configuration ............................................. 145
CCPRxH:CCPRxL Registers ................................... 145
Prescaler .................................................................. 145
Software Interrupt .................................................... 145
Timer1/Timer3 Mode Selection ................................ 145
Capture (ECCP Module) .................................................. 152
Capture/Compare (CCP Module)
Associated Registers ............................................... 147
Capture/Compare/PWM (CCP) ........................................ 143
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 144
CCP2 Pin Assignment ............................................. 144
CCPRxH Register .................................................... 144
CCPRxL Register ..................................................... 144
Compare Mode. See Compare.
Interaction of Two CCP Modules for
Timer Resources .............................................. 144
Module Configuration ............................................... 144
Clock Sources .................................................................... 32
Effects of Power-Managed Modes ............................. 34
Selecting the 31 kHz Source ...................................... 32
Selection Using OSCCON Register ........................... 32
CLRF ................................................................................ 329
CLRWDT .......................................................................... 329
Code Examples
16 x 16 Signed Multiply Routine ................................ 98
16 x 16 Unsigned Multiply Routine ............................ 98
8 x 8 Signed Multiply Routine .................................... 97
8 x 8 Unsigned Multiply Routine ................................ 97
Changing Between Capture Prescalers ................... 145
Computed GOTO Using an Offset Value ................... 62
Data EEPROM Read ................................................. 93
Data EEPROM Refresh Routine ................................ 94
Data EEPROM Write ................................................. 93
Erasing a Flash Program Memory Row ..................... 86
Executing Back to Back SLEEP Instructions ............. 36
Fast Register Stack .................................................... 62
How to Clear RAM (Bank 1) Using
Indirect Addressing ............................................ 74
Implementing a Real-Time Clock Using
a Timer1 Interrupt Service ............................... 135
Initializing PORTA .................................................... 113
Initializing PORTB .................................................... 116
Initializing PORTC .................................................... 119
Initializing PORTD .................................................... 122
Initializing PORTE .................................................... 125
Loading the SSPBUF (SSPSR) Register ................. 200
Reading a Flash Program Memory Word .................. 85
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 111
Writing to Flash Program Memory ....................... 88–89
Code Protection ............................................................... 291
COMF ............................................................................... 330
Comparator ...................................................................... 275
Analog Input Connection Considerations ................. 279
Associated Registers ............................................... 279
Configuration ............................................................ 276
Effects of a Reset ..................................................... 278
Interrupts ................................................................. 278
Operation ................................................................. 277
Operation During Sleep ........................................... 278
Outputs .................................................................... 277
Reference ................................................................ 277
External Signal ................................................ 277
Internal Signal .................................................. 277
Response Time ........................................................ 277
Comparator Specifications ............................................... 382
Comparator Voltage Reference ....................................... 281
Accuracy and Error .................................................. 282
Associated Registers ............................................... 283
Configuring .............................................................. 281
Connection Considerations ...................................... 282
Effects of a Reset .................................................... 282
Operation During Sleep ........................................... 282
Compare (CCP Module) .................................................. 146
CCP Pin Configuration ............................................. 146
CCPRx Register ...................................................... 146
Software Interrupt .................................................... 146
Special Event Trigger .............................. 141, 146, 274
Timer1/Timer3 Mode Selection ................................ 146
Compare (ECCP Module) ................................................ 152
Special Event Trigger .............................................. 152
Configuration Bits ............................................................ 292
Configuration Register Protection .................................... 311
Context Saving During Interrupts ..................................... 111
Conversion Considerations .............................................. 420
CPFSEQ .......................................................................... 330
CPFSGT .......................................................................... 331
CPFSLT ........................................................................... 331
Crystal Oscillator/Ceramic Resonator ................................ 25
Customer Change Notification Service ............................ 433
Customer Notification Service ......................................... 433
Customer Support ............................................................ 433
D
Data Addressing Modes .................................................... 74
Comparing Addressing Modes with the
Extended Instruction Set Enabled ..................... 78
Direct ......................................................................... 74
Indexed Literal Offset ................................................ 77
Indirect ....................................................................... 74
Inherent and Literal .................................................... 74
Data EEPROM
Code Protection ....................................................... 311
Data EEPROM Memory ..................................................... 91
Associated Registers ................................................. 95
EECON1 and EECON2 Registers ............................. 91
Operation During Code-Protect ................................. 94
Protection Against Spurious Write ............................. 94
Reading ..................................................................... 93
Using ......................................................................... 94
Write Verify ................................................................ 93
Writing ....................................................................... 93
Data Memory ..................................................................... 65
Access Bank .............................................................. 67
and the Extended Instruction Set .............................. 77
Bank Select Register (BSR) ...................................... 65
General Purpose Registers ....................................... 67
Map for PIC18F2455/2550/4455/4550 Devices ......... 66
Special Function Registers ........................................ 68
Map .................................................................... 68
USB RAM .................................................................. 65
DAW ................................................................................ 332
DS39632E-page 424
© 2009 Microchip Technology Inc.