PIC18F2455_09 Datasheet, PDF (356/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Exclusive OR W with f
XORWF f {,d {,a}}
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) .XOR. (f) → dest
N, Z
0001 10da ffff ffff
Exclusive OR the contents of W with
register ‘f’. If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored back
in the register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
XORWF
Before Instruction
REG
W
= AFh
= B5h
After Instruction
REG
W
= 1Ah
= B5h
REG, 1, 0
DS39632E-page 354
© 2009 Microchip Technology Inc.