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| PIC18F2455_09 Datasheet, PDF (12/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology | |||
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PIC18F2455/2550/4455/4550
FIGURE 1-1:
PIC18F2455/2550 (28-PIN) BLOCK DIAGRAM
Table Pointer<21>
Data Bus<8>
inc/dec logic
21
20
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
Address Latch
Program Memory
(24/32 Kbytes)
Data Latch
31 Level Stack
STKPTR
Data Latch
Data Memory
(2 Kbytes)
Address Latch
12
Data Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Access
Bank
12
8
Table Latch
inc/dec
logic
PORTA
PORTB
ROM Latch
Instruction Bus <16>
IR
Address
Decode
OSC1(2)
OSC2(2)
T1OSI
T1OSO
MCLR(1)
VDD, VSS
VUSB
Instruction
Decode &
Control
State Machine
Control Signals
8
PRODH PRODL
Internal
Oscillator
Block
INTRC
Oscillator
8 MHz
Oscillator
Single-Supply
Programming
In-Circuit
Debugger
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Fail-Safe
Clock Monitor
USB Voltage
Regulator
3
BITOP
8
8 x 8 Multiply
8
W
8
8
8
8
ALU<8>
8
Band Gap
Reference
PORTC
PORTE
BOR
HLVD
Data
EEPROM
Timer0
Timer1
Timer2
Timer3
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT/RCV
RA5/AN4/SS/HLVDIN/C2OUT
OSC2/CLKO/RA6
RB0/AN12/INT0/FLT0/SDI/SDA
RB1/AN10/INT1/SCK/SCL
RB2/AN8/INT2/VMO
RB3/AN9/CCP2(3)/VPO
RB4/AN11/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2(3)/UOE
RC2/CCP1
RC4/D-/VM
RC5/D+/VP
RC6/TX/CK
RC7/RX/DT/SDO
MCLR/VPP/RE3(1)
Comparator
CCP1
CCP2
MSSP
EUSART
ADC
10-Bit
USB
Note 1:
2:
3:
RE3 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not being used as digital I/O. Refer
to Section 2.0 âOscillator Configurationsâ for additional information.
RB3 is the alternate pin for CCP2 multiplexing.
DS39632E-page 10
© 2009 Microchip Technology Inc.
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