PIC18F2455_09 Datasheet, PDF (122/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 10-5: PORTC I/O SUMMARY
Pin
Function
TRIS
Setting
I/O
I/O Type
Description
RC0/T1OSO/
T13CKI
RC0
0
OUT DIG LATC<0> data output.
1
IN
ST PORTC<0> data input.
T1OSO
x
OUT ANA Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
T13CKI
1
IN
ST Timer1/Timer3 counter input.
RC1/T1OSI/
CCP2/UOE
RC1
0
OUT DIG LATC<1> data output.
1
IN
ST PORTC<1> data input.
T1OSI
CCP2⁽¹⁾
x
IN
ANA Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
0
OUT DIG CCP2 compare and PWM output; takes priority over port data.
1
IN
ST CCP2 capture input.
UOE
0
OUT DIG External USB transceiver OE output.
RC2/CCP1/
P1A
RC2
0
OUT DIG LATC<2> data output.
1
IN
ST PORTC<2> data input.
CCP1
0
OUT DIG ECCP1 compare and PWM output; takes priority over port data.
RC4/D-/VM
RC5/D+/VP
P1A⁽³⁾
RC4
D-
VM
RC5
D+
VP
1
0
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
—⁽²⁾
IN
OUT
IN
OUT
IN
IN
IN
OUT
IN
IN
ST
DIG
TTL
XCVR
XCVR
TTL
TTL
XCVR
XCVR
TTL
ECCP1 capture input.
ECCP1 Enhanced PWM output, Channel A; takes priority over port
data. May be configured for tri-state during Enhanced PWM shutdown
events.
PORTC<4> data input; disabled when USB module or on-chip
transceiver are enabled.
USB bus differential minus line output (internal transceiver).
USB bus differential minus line input (internal transceiver).
External USB transceiver VM input.
PORTC<5> data input; disabled when USB module or on-chip
transceiver are enabled.
USB bus differential plus line output (internal transceiver).
USB bus differential plus line input (internal transceiver).
External USB transceiver VP input.
RC6/TX/CK
RC6
0
OUT DIG LATC<6> data output.
1
IN
ST PORTC<6> data input.
TX
0
OUT DIG Asynchronous serial transmit data output (EUSART module); takes
priority over port data. User must configure as output.
CK
0
OUT DIG Synchronous serial clock output (EUSART module); takes priority
over port data.
1
IN
ST Synchronous serial clock input (EUSART module).
Legend:
Note 1:
2:
3:
OUT = Output, IN = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, XCVR = USB transceiver, x = Don’t care (TRIS bit does not affect port direction or is overridden
for this option)
Default pin assignment. Alternate pin assignment is RB3 (when CCP2MX = 0).
RC4 and RC5 do not have corresponding TRISC bits. In Port mode, these pins are input only. USB data direction is
determined by the USB configuration.
40/44-pin devices only.
DS39632E-page 120
© 2009 Microchip Technology Inc.