PIC18F2455_09 Datasheet, PDF (432/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TXSTA (Transmit Status and Control) ..................... 244
UCFG (USB Configuration) ...................................... 168
UCON (USB Control) ............................................... 166
UEIE (USB Error Interrupt Enable) .......................... 185
UEIR (USB Error Interrupt Status) ........................... 184
UEPn (USB Endpoint n Control) .............................. 172
UIE (USB Interrupt Enable) ...................................... 183
UIR (USB Interrupt Status) ...................................... 181
USTAT (USB Status) ............................................... 171
WDTCON (Watchdog Timer Control) ....................... 304
RESET ............................................................................. 343
Reset State of Registers .................................................... 52
Resets ........................................................................ 45, 291
Brown-out Reset (BOR) ........................................... 291
Oscillator Start-up Timer (OST) ............................... 291
Power-on Reset (POR) ............................................ 291
Power-up Timer (PWRT) ......................................... 291
RETFIE ............................................................................ 344
RETLW ............................................................................. 344
RETURN .......................................................................... 345
Return Address Stack ........................................................ 60
and Associated Registers .......................................... 60
Return Stack Pointer (STKPTR) ........................................ 61
Revision History ............................................................... 419
RLCF ................................................................................ 345
RLNCF ............................................................................. 346
RRCF ............................................................................... 346
RRNCF ............................................................................. 347
S
SCK .................................................................................. 197
SDI ................................................................................... 197
SDO ................................................................................. 197
SEC_IDLE Mode ................................................................ 41
SEC_RUN Mode ................................................................ 36
Serial Clock, SCK ............................................................. 197
Serial Data In (SDI) .......................................................... 197
Serial Data Out (SDO) ..................................................... 197
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 347
Slave Select (SS) ............................................................. 197
SLEEP .............................................................................. 348
Sleep
OSC1 and OSC2 Pin States ...................................... 34
Sleep Mode ........................................................................ 40
Software Simulator (MPLAB SIM) .................................... 364
Special Event Trigger. See Compare (CCP Module).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ............................................ 291
Special ICPORT Features ................................................ 311
SPI Mode (MSSP)
Associated Registers ............................................... 206
Bus Mode Compatibility ........................................... 206
Effects of a Reset ..................................................... 206
Enabling SPI I/O ...................................................... 201
Master Mode ............................................................ 202
Master/Slave Connection ......................................... 201
Operation ................................................................. 200
Operation in Power-Managed Modes ...................... 206
Serial Clock .............................................................. 197
Serial Data In ........................................................... 197
Serial Data Out ........................................................ 197
Slave Mode .............................................................. 204
Slave Select ............................................................. 197
Slave Select Synchronization .................................. 204
SPI Clock ................................................................. 202
DS39632E-page 430
Typical Connection .................................................. 201
SPP. See Streaming Parallel Port. .................................. 191
SS .................................................................................... 197
SSPOV ............................................................................ 232
SSPOV Status Flag ......................................................... 232
SSPSTAT Register
R/W Bit .................................................................... 214
SSPxSTAT Register
R/W Bit .................................................................... 212
Stack Full/Underflow Resets .............................................. 62
STATUS Register .............................................................. 73
Streaming Parallel Port .................................................... 191
Associated Registers ............................................... 196
Clocking Data .......................................................... 192
Configuration ........................................................... 191
Internal Pull-ups ....................................................... 192
Interrupts ................................................................. 194
Microcontroller Control Setup .................................. 194
Reading from (Microcontroller Mode) ...................... 195
Transfer of Data Between USB SIE
and SPP (diagram) .......................................... 194
USB Control Setup .................................................. 194
Wait States .............................................................. 192
Writing to (Microcontroller Mode) ............................. 194
SUBFSR .......................................................................... 359
SUBFWB ......................................................................... 348
SUBLW ............................................................................ 349
SUBULNK ........................................................................ 359
SUBWF ............................................................................ 349
SUBWFB ......................................................................... 350
SWAPF ............................................................................ 350
T
T0CON Register
PSA Bit .................................................................... 129
T0CS Bit .................................................................. 128
T0PS2:T0PS0 Bits ................................................... 129
T0SE Bit .................................................................. 128
Table Pointer Operations (table) ........................................ 84
Table Reads/Table Writes ................................................. 62
TBLRD ............................................................................. 351
TBLWT ............................................................................. 352
Time-out in Various Situations (table) ................................ 49
Timer0 .............................................................................. 127
16-Bit Mode Timer Reads and Writes ...................... 128
Associated Registers ............................................... 129
Clock Source Edge Select (T0SE Bit) ..................... 128
Clock Source Select (T0CS Bit) ............................... 128
Operation ................................................................. 128
Overflow Interrupt .................................................... 129
Prescaler ................................................................. 129
Switching Assignment ..................................... 129
Prescaler. See Prescaler, Timer0.
Timer1 .............................................................................. 131
16-Bit Read/Write Mode .......................................... 133
Associated Registers ............................................... 136
Interrupt ................................................................... 134
Operation ................................................................. 132
Oscillator .......................................................... 131, 133
Layout Considerations ..................................... 134
Low-Power Option ........................................... 133
Using Timer1 as a Clock Source ..................... 133
Overflow Interrupt .................................................... 131
Resetting, Using a Special Event
Trigger Output (CCP) ...................................... 134
Special Event Trigger (ECCP) ................................. 152
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