PIC18F2455_09 Datasheet, PDF (28/438 Pages) Microchip Technology – 28/40/44-Pin,High-Performance,Enhanced Flash,USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 2-2: CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Osc Type
Crystal
Freq
Typical Capacitor Values
Tested:
C1
C2
XT
4 MHz
27 pF
27 pF
HS
4 MHz
27 pF
27 pF
8 MHz
22 pF
22 pF
20 MHz
15 pF
15 pF
Capacitor values are for design guidance only.
These capacitors were tested with the crystals listed
below for basic start-up and operation. These values
are not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
VDD and temperature range for the application.
See the notes following this table for additional
information.
Crystals Used:
4 MHz
8 MHz
20 MHz
Note 1: Higher capacitance increases the stability
of oscillator but also increases the
start-up time.
2: When operating below 3V VDD, or when
using certain ceramic resonators at any
voltage, it may be necessary to use the
HS mode or switch to a crystal oscillator.
3: Since each resonator/crystal has its own
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate values of external
components.
4: Rs may be required to avoid overdriving
crystals with low drive level specification.
5: Always verify oscillator performance over
the VDD and temperature range that is
expected for the application.
An internal postscaler allows users to select a clock
frequency other than that of the crystal or resonator.
Frequency division is determined by the CPUDIV
Configuration bits. Users may select a clock frequency
of the oscillator frequency, or 1/2, 1/3 or 1/4 of the
frequency.
An external clock may also be used when the micro-
controller is in HS Oscillator mode. In this case, the
OSC2/CLKO pin is left open (Figure 2-3).
FIGURE 2-3:
EXTERNAL CLOCK INPUT
OPERATION (HS OSC
CONFIGURATION)
Clock from
Ext. System
Open
OSC1
PIC18FXXXX
OSC2 ^{(HS Mode)}
2.2.3 EXTERNAL CLOCK INPUT
The EC, ECIO, ECPLL and ECPIO Oscillator modes
require an external clock source to be connected to the
OSC1 pin. There is no oscillator start-up time required
after a Power-on Reset or after an exit from Sleep
mode.
In the EC and ECPLL Oscillator modes, the oscillator
frequency divided by 4 is available on the OSC2 pin.
This signal may be used for test purposes or to
synchronize other logic. Figure 2-4 shows the pin
connections for the EC Oscillator mode.
FIGURE 2-4:
EXTERNAL CLOCK
INPUT OPERATION
(EC AND ECPLL
CONFIGURATION)
Clock from
Ext. System
FOSC/4
OSC1/CLKI
PIC18FXXXX
OSC2/CLKO
The ECIO and ECPIO Oscillator modes function like the
EC and ECPLL modes, except that the OSC2 pin
becomes an additional general purpose I/O pin. The I/O
pin becomes bit 6 of PORTA (RA6). Figure 2-5 shows
the pin connections for the ECIO Oscillator mode.
FIGURE 2-5:
EXTERNAL CLOCK
INPUT OPERATION
(ECIO AND ECPIO
CONFIGURATION)
Clock from
Ext. System
RA6
OSC1/CLKI
PIC18FXXXX
I/O (OSC2)
The internal postscaler for reducing clock frequency in
XT and HS modes is also available in EC and ECIO
modes.
DS39632E-page 26
© 2009 Microchip Technology Inc.