PIC18F2221_1 Datasheet, PDF (54/402 Pages) Microchip Technology – Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2221/2321/4221/4321 FAMILY
5.6 Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations, as indicated in Table 5-3. These bits
are used in software to determine the nature of the
Reset.
Table 5-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
TABLE 5-3: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION
FOR RCON REGISTER
Condition
Program
Counter
RCON Register
STKPTR Register
RI TO PD POR BOR STKFUL STKUNF
Power-on Reset
RESET Instruction
Brown-out
0000h
11100
0
0
0000h
0uuuu
u
u
0000h
111u0
u
u
MCLR during power-managed Run modes
0000h
u1uuu
u
u
MCLR during power-managed Idle modes
0000h
u10uu
u
u
and Sleep mode
WDT Time-out during full power or
power-managed Run mode
0000h
u0uuu
u
u
MCLR during full power execution
0000h
uuuuu
u
u
Stack Full Reset (STVREN = 1)
0000h
uuuuu
1
u
Stack Underflow Reset (STVREN = 1)
0000h
uuuuu
u
1
Stack Underflow Error (not an actual Reset,
0000h
uuuuu
u
1
STVREN = 0)
WDT time-out during power-managed Idle or PC + 2
u00uu
u
u
Sleep modes
Interrupt exit from power-managed modes
PC + 2⁽¹⁾
u
u
0
u
u
u
u
Legend:
Note 1:
2:
u = unchanged
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (008h or 0018h).
Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled
(BOREN<1:0> Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’.
DS39689F-page 54
© 2009 Microchip Technology Inc.