PIC18F2221_1 Datasheet, PDF (364/402 Pages) Microchip Technology – Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2221/2321/4221/4321 FAMILY
FIGURE 27-16:
SS
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
82
70
SCK
(CKP = 0)
83
71
72
SCK
(CKP = 1)
80
SDO
SDI
MSb
bit 6 - - - - - -1
LSb
75, 76
77
MSb In
bit 6 - - - -1
LSb In
74
TABLE 27-17: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
70 TssL2scH, SS ↓ to SCK ↓ or SCK ↑ Input
TssL2scL
3 TCY
—
71 TscH
SCK Input High Time
Continuous
1.25 TCY + 30 —
71A
Single Byte
40
—
72 TscL
SCK Input Low Time
Continuous
1.25 TCY + 30 —
72A
Single Byte
40
—
73A Tb2b
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 TCY + 40 —
74 TscH2diL, Hold Time of SDI Data Input to SCK Edge
TscL2diL
40
—
75 TdoR
SDO Data Output Rise Time
PIC18FXXXX
—
25
PIC18LFXXXX
45
76 TdoF
SDO Data Output Fall Time
—
25
77 TssH2doZ SS ↑ to SDO Output High-Impedance
10
50
80 TscH2doV, SDO Data Output Valid after SCK PIC18FXXXX
TscL2doV Edge
PIC18LFXXXX
—
50
—
100
82 TssL2doV SDO Data Output Valid after SS ↓ PIC18FXXXX
Edge
PIC18LFXXXX
—
50
—
100
83 TscH2ssH, SS ↑ after SCK Edge
TscL2ssH
1.5 TCY + 40 —
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns
ns (Note 1)
ns
ns (Note 1)
ns (Note 2)
ns
ns
ns VDD = 2.0V
ns
ns
ns
ns VDD = 2.0V
ns
ns VDD = 2.0V
ns
DS39689F-page 364
© 2009 Microchip Technology Inc.