PIC18F2221_1 Datasheet, PDF (390/402 Pages) Microchip Technology – Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2221/2321/4221/4321 FAMILY
C
C Compilers
MPLAB C18 ............................................................. 330
MPLAB C30 ............................................................. 330
CALL ................................................................................ 294
CALLW ............................................................................. 323
Capture (CCP Module) ..................................................... 147
Associated Registers ............................................... 149
CCP Pin Configuration ............................................. 147
CCPRxH:CCPRxL Registers ................................... 147
Prescaler .................................................................. 147
Software Interrupt .................................................... 147
Timer1/Timer3 Mode Selection ................................ 147
Capture (ECCP Module) .................................................. 154
Capture/Compare/PWM (CCP) ........................................ 145
Capture Mode. See Capture.
CCPRxH Register .................................................... 146
CCPRxL Register ..................................................... 146
Compare Mode. See Compare.
Interaction of Two CCP Modules ............................. 146
Module Configuration ............................................... 146
Pin Assignment ........................................................ 146
Timer Resources ...................................................... 146
Clock Sources .................................................................... 35
Selecting the 31 kHz Source ...................................... 36
Selection Using OSCCON Register ........................... 36
CLRF ................................................................................ 295
CLRWDT .......................................................................... 295
Code Examples
16 x 16 Signed Multiply Routine ................................ 96
16 x 16 Unsigned Multiply Routine ............................ 96
8 x 8 Signed Multiply Routine .................................... 95
8 x 8 Unsigned Multiply Routine ................................ 95
Address Masking ..................................................... 182
Changing Between Capture Prescalers ................... 147
Computed GOTO Using an Offset Value ................... 62
Data EEPROM Read ................................................. 91
Data EEPROM Refresh Routine ................................ 92
Data EEPROM Write ................................................. 91
Erasing a Flash Program Memory Row ..................... 84
Fast Register Stack .................................................... 62
How to Clear RAM (Bank 1) Using Indirect
Addressing ......................................................... 73
Implementing a Real-Time Clock Using a
Timer1 Interrupt Service .................................. 137
Initializing PORTA .................................................... 111
Initializing PORTB .................................................... 114
Initializing PORTC .................................................... 117
Initializing PORTD .................................................... 120
Initializing PORTE .................................................... 123
Loading the SSPBUF (SSPSR) Register ................. 170
Reading a Flash Program Memory Word .................. 83
Saving STATUS, WREG and BSR
Registers in RAM ............................................. 109
Writing to Flash Program Memory ....................... 86–87
Code Protection ....................................................... 259, 274
Associated Registers ............................................... 275
Configuration Register Protection ............................ 277
Data EEPROM ......................................................... 277
Program Memory ..................................................... 275
COMF ............................................................................... 296
Comparator ...................................................................... 243
Analog Input Connection Considerations ................. 247
Associated Registers ............................................... 247
Configuration ............................................................ 244
Effects of a Reset .................................................... 246
Interrupts ................................................................. 246
Operation ................................................................. 245
Operation During Sleep ........................................... 246
Outputs .................................................................... 245
Reference ................................................................ 245
External Signal ................................................ 245
Internal Signal .................................................. 245
Response Time ........................................................ 245
Comparator Specifications ............................................... 350
Comparator Voltage Reference ....................................... 249
Accuracy and Error .................................................. 250
Associated Registers ............................................... 251
Configuring .............................................................. 249
Connection Considerations ...................................... 250
Effects of a Reset .................................................... 250
Operation During Sleep ........................................... 250
Compare (CCP Module) .................................................. 148
CCPRx Register ...................................................... 148
Pin Configuration ..................................................... 148
Software Interrupt .................................................... 148
Special Event Trigger .............................. 143, 148, 242
Timer1/Timer3 Mode Selection ................................ 148
Compare (ECCP Module) ................................................ 154
Special Event Trigger .............................................. 154
Computed GOTO ............................................................... 62
Configuration Bits ............................................................ 259
Context Saving During Interrupts ..................................... 109
Conversion Considerations .............................................. 387
CPFSEQ .......................................................................... 296
CPFSGT .......................................................................... 297
CPFSLT ........................................................................... 297
Crystal Oscillator/Ceramic Resonator ................................ 29
Customer Change Notification Service ............................ 399
Customer Notification Service ......................................... 399
Customer Support ............................................................ 399
D
Data Addressing Modes .................................................... 73
Comparing Options with the Extended
Instruction Set Enabled ..................................... 76
Direct ......................................................................... 73
Indexed Literal Offset ................................................ 75
Instructions Affected .......................................... 75
Indirect ....................................................................... 73
Inherent and Literal .................................................... 73
Data EEPROM Memory ..................................................... 89
Associated Registers ................................................. 93
EEADR Register ........................................................ 89
EECON1 Register ...................................................... 89
EECON2 Register ...................................................... 89
EEDATA Register ...................................................... 89
Operation During Code-Protect ................................. 92
Protection Against Spurious Write ............................. 92
Reading ..................................................................... 91
Using ......................................................................... 92
Write Verify ................................................................ 91
Writing ....................................................................... 91
Data Memory ..................................................................... 65
Access Bank .............................................................. 67
and the Extended Instruction Set .............................. 75
Bank Select Register (BSR) ...................................... 65
General Purpose Registers ....................................... 67
Map for PIC18F2221/2321/4221/4321 Family ........... 66
Special Function Registers ........................................ 68
DS39689F-page 390
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