PIC18F2221_1 Datasheet, PDF (389/402 Pages) Microchip Technology – Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2221/2321/4221/4321 FAMILY
INDEX
A
A/D ................................................................................... 233
Acquisition Requirements ........................................ 238
ADCON0 Register .................................................... 233
ADCON1 Register .................................................... 233
ADCON2 Register .................................................... 233
ADRESH Register ............................................ 233, 236
ADRESL Register .................................................... 233
Analog Port Pins, Configuring .................................. 240
Associated Registers ............................................... 242
Configuring the Module ............................................ 237
Conversion Clock (TAD) ........................................... 239
Conversion Requirements ....................................... 371
Conversion Status (GO/DONE Bit) .......................... 236
Conversions ............................................................. 241
Converter Characteristics ........................................ 370
Converter Interrupt, Configuring .............................. 237
Discharge ................................................................. 241
Operation in Power-Managed Modes ...................... 240
Selecting and Configuring Acquisition Time ............ 239
Special Event Trigger (CCP) .................................... 242
Special Event Trigger (ECCP) ................................. 154
Use of the CCP2 Trigger .......................................... 242
Absolute Maximum Ratings ............................................. 333
AC (Timing) Characteristics ............................................. 352
Load Conditions for Device Timing
Specifications ................................................... 353
Parameter Symbology ............................................. 352
Temperature and Voltage Specifications ................. 353
Timing Conditions .................................................... 353
AC Characteristics
Internal RC Accuracy ............................................... 355
Access Bank
Mapping with Indexed Literal Offset
Addressing Mode ............................................... 77
ACKSTAT ........................................................................ 201
ACKSTAT Status Flag ..................................................... 201
ADCON0 Register ............................................................ 233
GO/DONE Bit ........................................................... 236
ADCON1 Register ............................................................ 233
ADCON2 Register ............................................................ 233
ADDFSR .......................................................................... 322
ADDLW ............................................................................ 285
ADDULNK ........................................................................ 322
ADDWF ............................................................................ 285
ADDWFC ......................................................................... 286
ADRESH Register ............................................................ 233
ADRESL Register .................................................... 233, 236
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 286
ANDWF ............................................................................ 287
Assembler
MPASM Assembler .................................................. 330
Auto-Wake-up on Sync Break Character ......................... 226
B
Bank Select Register (BSR) ............................................... 65
Baud Rate Generator ....................................................... 197
BC .................................................................................... 287
BCF .................................................................................. 288
BF .................................................................................... 201
BF Status Flag ................................................................. 201
© 2009 Microchip Technology Inc.
Block Diagrams
A/D ........................................................................... 236
Analog Input Model .................................................. 237
Baud Rate Generator .............................................. 197
Capture Mode Operation ......................................... 147
Comparator Analog Input Model .............................. 247
Comparator I/O Operating Modes ........................... 244
Comparator Output .................................................. 246
Comparator Voltage Reference ............................... 250
Comparator Voltage Reference Output
Buffer Example ................................................ 251
Compare Mode Operation ....................................... 148
Device Clock .............................................................. 35
Enhanced PWM ....................................................... 155
EUSART Receive .................................................... 225
EUSART Transmit ................................................... 222
External Power-on Reset Circuit
(Slow VDD Power-up) ........................................ 49
Fail-Safe Clock Monitor ........................................... 272
Generic I/O Port ....................................................... 111
High/Low-Voltage Detect with External Input .......... 254
HSPLL ....................................................................... 31
Interrupt Logic ............................................................ 98
INTOSC and PLL ....................................................... 32
MSSP (I²C Master Mode) ........................................ 195
MSSP (I²C Mode) .................................................... 176
MSSP (SPI Mode) ................................................... 167
On-Chip Reset Circuit ................................................ 47
PIC18F2221/2321 ..................................................... 12
PIC18F4221/4321 ..................................................... 13
PORTD and PORTE (Parallel Slave Port) ............... 126
PWM Operation (Simplified) .................................... 150
Reads from Flash Program Memory ......................... 83
Single Comparator ................................................... 245
Table Read Operation ............................................... 79
Table Write Operation ............................................... 80
Table Writes to Flash Program Memory .................... 85
Timer0 in 16-Bit Mode ............................................. 130
Timer0 in 8-Bit Mode ............................................... 130
Timer1 ..................................................................... 134
Timer1 (16-Bit Read/Write Mode) ............................ 134
Timer2 ..................................................................... 140
Timer3 ..................................................................... 142
Timer3 (16-Bit Read/Write Mode) ............................ 142
Watchdog Timer ...................................................... 269
BN .................................................................................... 288
BNC ................................................................................. 289
BNN ................................................................................. 289
BNOV .............................................................................. 290
BNZ ................................................................................. 290
BOR. See Brown-out Reset.
BOV ................................................................................. 293
BRA ................................................................................. 291
Break Character (12-Bit) Transmit and Receive .............. 227
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 50
Detecting ................................................................... 50
Disabling in Sleep Mode ............................................ 50
Software Enabled ...................................................... 50
BSF .................................................................................. 291
BTFSC ............................................................................. 292
BTFSS ............................................................................. 292
BTG ................................................................................. 293
BZ .................................................................................... 294
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