PIC16F870_13 Datasheet, PDF (52/172 Pages) Microchip Technology – 28/40-Pin, 8-Bit CMOS FLASH Microcontrollers

PIC16F870/871
6.7 Resetting of Timer1 Register Pair
(TMR1H, TMR1L)
TMR1H and TMR1L registers are not reset to 00h on a
POR, or any other RESET, except by the CCP1 special
event trigger.
T1CON register is reset to 00h on a Power-on Reset,
or a Brown-out Reset, which shuts off the timer and
leaves a 1:1 prescale. In all other RESETS, the register
is unaffected.
6.8 Timer1 Prescaler
The prescaler counter is cleared on writes to the
TMR1H or TMR1L registers.
TABLE 6-2: REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Address Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
RESETS
0Bh,8Bh, INTCON GIE
10Bh, 18Bh
0Ch
PIR1 PSPIF⁽¹⁾
8Ch
PIE1 PSPIE⁽¹⁾
PEIE
ADIF
ADIE
T0IE
RCIF
RCIE
INTE
TXIF
TXIE
RBIE
T0IF INTF RBIF 0000 000x 0000 000u
—
CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000
—
CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000
0Eh
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
0Fh
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
10h
T1CON —
— T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer1 module.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
DS30569C-page 52
 2000-2013 Microchip Technology Inc.