PIC16F870_13 Datasheet, PDF (33/172 Pages) Microchip Technology – 28/40-Pin, 8-Bit CMOS FLASH Microcontrollers

4.0 I/O PORTS
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
Additional information on I/O ports may be found in the
PIC^® Mid-Range MCU Family Reference Manual
(DS33023).
4.1 PORTA and the TRISA Register
PORTA is a 6-bit wide bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the pins,
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. Therefore,
a write to a port implies that the port pins are read, the
value is modified and then written to the port data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other PORTA pins have TTL input levels and full
CMOS output drivers.
Other PORTA pins are multiplexed with analog inputs
and analog VREF input. The operation of each pin is
selected by clearing/setting the control bits in the
ADCON1 register (A/D Control Register 1).
Note:
On a Power-on Reset, these pins are
configured as analog inputs and read as
'0'.
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 4-1: INITIALIZING PORTA
BCF
BCF
CLRF
STATUS, RP0
STATUS, RP1
PORTA
BSF
MOVLW
MOVWF
MOVLW
STATUS, RP0
0x06
ADCON1
0xCF
MOVWF TRISA
;
;Bank0
;Initialize PORTA by
;clearing output
;data latches
;Select Bank 1
;Configure all pins
;as digital inputs
;Value used to
;initialize data
;direction
;Set RA<3:0> as
;inputs
;RA<5:4> as outputs
;TRISA<7:6> are
;always read as '0'.
PIC16F870/871
FIGURE 4-1:
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
Data
Bus
D
Q
VDD
WR
Port
CK
Q
P
Data Latch
D
Q
N
I/O pin⁽¹⁾
WR
TRIS
CK
Q
TRIS Latch
VSS
Analog
Input
Mode
RD TRIS
Q
D
TTL
Input
Buffer
EN
RD PORT
To A/D Converter
Note 1: I/O pins have protection diodes to VDD and VSS.
FIGURE 4-2:
BLOCK DIAGRAM OF
RA4/T0CKI PIN
Data
Bus
WR
PORT
DQ
CK Q
Data Latch
N
I/O pin⁽¹⁾
WR
TRIS
DQ
CK Q
TRIS Latch
VSS
Schmitt
Trigger
Input
Buffer
RD PORT
RD TRIS
QD
ENEN
TMR0 Clock Input
Note 1: I/O pin has protection diodes to VSS only.
 2000-2013 Microchip Technology Inc.
DS30569C-page 33