PIC24FJ64GA004-IPT Datasheet, PDF (43/52 Pages) Microchip Technology – PIC24FJXXXGA0XX Flash Programming Specification

PIC24FJXXXGA0XX
TABLE 5-5: PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED)
Command
(Binary)
Data
(Hex)
Description
Step 7: Repeat Steps 5 and 6 to erase the second page of executive memory. The W1 Pointer should be
incremented by 400h to point to the second page.
Step 8: Initialize TBLPAG and NVMCON to write stored diagnostic and calibration as single words. Initialize W1
and W2 as Write and Read Pointers to rewrite stored Diagnostic and Calibration Words.
0000
0000
0000
0000
0000
0000
0000
200800
MOV
880190
MOV
240031
MOV
883B01
MOV
207F00
MOV
2000C2
MOV
000000
NOP
#0x80, W0
W0, TBLPAG
#0x4003, W1
W1, NVMCON
#0x07F0, W1
#0xC, W2
Step 9: Perform write of a single word of calibration data and initiate single-word write cycle.
0000
0000
0000
0000
0000
0000
BB18B2
000000
000000
A8E761
000000
000000
TBLWTL
NOP
NOP
BSET
NOP
NOP
[W2++], [W1++]
NVMCON, #15
Step 10: Repeat this step to poll the WR bit (bit 15 of NVMCON) until it is cleared by the hardware.
0000
0000
0000
0000
0000
0001
0000
040200
000000
803B00
883C20
000000
<VISI>
000000
GOTO 0x200
NOP
MOV
NVMCON, W0
MOV
W0, VISI
NOP
Clock out contents of VISI register.
NOP
Step 11: Repeat steps 9-10 seven more times to program the remainder of the Diagnostic and Calibration Words
back into program memory.
Step 12: Initialize the NVMCON to program 64 instruction words.
0000
0000
240010
MOV
883B00
MOV
#0x4001, W0
W0, NVMCON
Step 13: Initialize TBLPAG and the Write Pointer (W7).
0000
0000
0000
0000
200800
MOV
880190
MOV
EB0380
CLR
000000
NOP
#0x80, W0
W0, TBLPAG
W7
Step 14: Load W0:W5 with the next four words of packed programming executive code and initialize W6 for
programming. Programming starts from the base of executive memory (800000h) using W6 as a Read
Pointer and W7 as a Write Pointer.
0000
0000
0000
0000
0000
0000
2<LSW0>0
MOV
2<MSB1:MSB0>1 MOV
2<LSW1>2
MOV
2<LSW2>3
MOV
2<MSB3:MSB2>4 MOV
2<LSW3>5
MOV
#<LSW0>, W0
#<MSB1:MSB0>, W1
#<LSW1>, W2
#<LSW2>, W3
#<MSB3:MSB2>, W4
#<LSW3>, W5
© 2008 Microchip Technology Inc.
DS39768D-page 43