PIC24FJ64GA004-IPT Datasheet, PDF (2/52 Pages) Microchip Technology – PIC24FJXXXGA0XX Flash Programming Specification

PIC24FJXXXGA0XX
The regulator provides power to the core from the other
VDD pins. A low-ESR capacitor (such as tantalum) must
be connected to the VDDCORE pin (Figure 2-2 and
Figure 2-3). This helps to maintain the stability of the
regulator. The specifications for core voltage and capac-
itance are listed in Section 7.0 “AC/DC Characteristics
and Timing Requirements”.
FIGURE 2-2:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(64/80/100-PIN DEVICES)
Regulator Enabled (ENVREG tied to VDD):
3.3V
CEFC
(10 μF typ)
PIC24FJXXXGA0XX
VDD
ENVREG
VDDCORE/VCAP
VSS
Regulator Disabled (ENVREG tied to ground):
2.5V⁽¹⁾
3.3V⁽¹⁾
PIC24FJXXXGA0XX
VDD
ENVREG
VDDCORE/VCAP
VSS
Regulator Disabled (VDD tied to VDDCORE):
2.5V⁽¹⁾
PIC24FJXXXGA0XX
VDD
ENVREG
VDDCORE/VCAP
VSS
Note 1:
These are typical operating voltages. Refer
to Section 7.0 “AC/DC Characteristics and
Timing Requirements” for the full operating
ranges of VDD and VDDCORE.
FIGURE 2-3:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(28/44-PIN DEVICES)
Regulator Enabled (DISVREG tied to VSS):
3.3V
CEFC
(10 μF typ)
PIC24FJXXXGA0XX
VDD
DISVREG
VDDCORE/VCAP
VSS
Regulator Disabled (DISVREG tied to VDD):
2.5V⁽¹⁾
3.3V⁽¹⁾
PIC24FJXXXGA0XX
VDD
DISVREG
VDDCORE/VCAP
VSS
Regulator Disabled (VDD tied to VDDCORE):
2.5V⁽¹⁾
PIC24FJXXXGA0XX
VDD
DISVREG
VDDCORE/VCAP
VSS
Note 1:
These are typical operating voltages. Refer
to Section 7.0 “AC/DC Characteristics and
Timing Requirements” for the full operating
ranges of VDD and VDDCORE.
DS39768D-page 2
© 2008 Microchip Technology Inc.