PIC24FJ64GA004-IPT Datasheet, PDF (24/52 Pages) Microchip Technology – PIC24FJXXXGA0XX Flash Programming Specification

PIC24FJXXXGA0XX
3.9 Reading Configuration Words
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read (with the upper
byte read being all ‘0’s) instead of 24-bit words. Since
there are two Configuration registers, they are read one
register at a time.
Table 3-9 shows the ICSP programming details for
reading the Configuration Words. Note that the
TBLPAG register must be loaded with 00h for 96 Kbyte
and below devices and 01h for 128 Kbyte devices (the
upper byte address of configuration memory), and the
Read Pointer, W6, is initialized to the lower 16 bits of
the Configuration Word location.
TABLE 3-9: SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
Command
(Binary)
Data
(Hex)
Description
Step 1: Exit Reset vector.
0000
0000
0000
000000
040200
000000
NOP
GOTO
NOP
0x200
Step 2: Initialize TBLPAG, the Read Pointer (W6) and the Write Pointer (W7) for TBLRD instruction.
0000
0000
0000
0000
0000
200xx0
MOV
880190
MOV
2xxxx7
MOV
207847
MOV
000000
NOP
<CW2Address23:16>, W0
W0, TBLPAG
<CW2Address15:0>, W6
#VISI, W7
Step 3: Read the Configuration register and write it to the VISI register (located at 784h), and clock out the
VISI register using the REGOUT command.
0000
0000
0000
0001
0000
BA0BB6
000000
000000
<VISI>
000000
TBLRDL [W6++], [W7]
NOP
NOP
Clock out contents of VISI register
NOP
Step 4: Repeat Step 3 again to read Configuration Word 1.
Step 5: Reset device internal PC.
0000
0000
040200
000000
GOTO
NOP
0x200
DS39768D-page 24
© 2008 Microchip Technology Inc.