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PIC24HJ32GP302_11 Datasheet, PDF (139/368 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers | |||
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PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
11.7 Peripheral Pin Select Registers
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 family of devices
implement 27 registers for remappable peripheral
configuration:
⢠14 Input Remappable Peripheral Registers:
- RPINR0-RPINR1, RPINR3-RPINR4,
RPINR7, RPINR10-RPINR11, RPINR18-
RPINR23 and PRINR26
⢠13 Output Remappable Peripheral Registers:
- RPOR0-RPOR12
Note:
Input and Output Register values can only
be changed if the IOLOCK bit
(OSCCON<6>) is set to â0â. See
Section 11.6.3.1 âControl Register
Lockâ for a specific command sequence.
REGISTER 11-1: RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
U-0
â
bit 15
U-0
U-0
R/W-1
R/W-1
R/W-1
â
â
INT1R<4:0>
R/W-1
R/W-1
bit 8
U-0
â
bit 7
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
U-0
U-0
â
â
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12-8
bit 7-0
Unimplemented: Read as â0â
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied to VSS
11001 = Input tied to RP25
â¢
â¢
â¢
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as â0â
© 2011 Microchip Technology Inc.
DS70293E-page 139
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