PIC24HJ32GP302_11 Datasheet, PDF (109/368 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
REGISTER 8-2: DMAxREQ: DMA CHANNEL x IRQ SELECT REGISTER
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
FORCE⁽¹⁾
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
U-0
U-0
IRQSEL<6:0>⁽²⁾
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-7
bit 6-0
FORCE: Force DMA Transfer bit⁽¹⁾
1 = Force a single DMA transfer (Manual mode)
0 = Automatic DMA transfer initiation by DMA request
Unimplemented: Read as ‘0’
IRQSEL<6:0>: DMA Peripheral IRQ Number Select bits⁽²⁾
0000000-1111111 = DMAIRQ0-DMAIRQ127 selected to be Channel DMAREQ
Note 1: The FORCE bit cannot be cleared by the user. The FORCE bit is cleared by hardware when the forced
DMA transfer is complete.
2: Refer to Table 7-1 for a complete listing of IRQ numbers for all interrupt sources.
© 2011 Microchip Technology Inc.
DS70293E-page 109