PIC24HJ32GP302_11 Datasheet, PDF (117/368 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers

PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
9.0 OSCILLATOR
CONFIGURATION
Note 1: This data sheet summarizes the features
of
the
PIC24HJ32GP302/304,
PIC24HJ64GPX02/X04
and
PIC24HJ128GPX02/X04 families of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 39. “Oscillator (Part
III)” (DS70216) of the “dsPIC33F/
PIC24H Family Reference Manual”,
which is available from the Microchip
website (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 oscillator system
provides:
• External and internal oscillator options as clock
sources
• An on-chip Phase-Locked Loop (PLL) to scale the
internal operating frequency to the required
system clock frequency
• An internal FRC oscillator that can also be used
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• An Oscillator Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
A simplified diagram of the oscillator system is shown
in Figure 9-1.
FIGURE 9-1:
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
OSCILLATOR SYSTEM DIAGRAM
Primary Oscillator
OSC1
POSCCLK
R⁽²⁾
S3
S1
OSC2
POSCMD<1:0>
PLL⁽¹⁾
XT, HS, EC
S2
XTPLL, HSPLL,
ECPLL, FRCPLL
FVCO⁽¹⁾
S1/S3
DOZE<2:0>
FCY(3)
FP(3)
FRC
Oscillator
÷2
FRCDIVN _S7
FOSC
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
SOSCI
LPRC
Oscillator
Secondary Oscillator
LPOSCEN
FRCDIV16 _S6
FRC _S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer1
Note 1:
2:
3:
See Figure 9-2 for PLL details.
If the Oscillator is used with XT or HS modes, an extended parallel resistor with the value of 1 MΩ must be connected.
The term FP refers to the clock source for all the peripherals, while FCY refers to the clock source for the CPU. Throughout this
document FCY and FP are used interchangeably, except in the case of Doze mode. FP and FCY will be different when Doze
mode is used in any ratio other than 1:1, which is the default.
© 2011 Microchip Technology Inc.
DS70293E-page 117