71M6533 Datasheet, PDF (85/132 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS_6533_6534_004
DIO_0[7:0]
DIO_1[7:0]
DIO_2[7:0]
DIO_3[6:0]
SFR 80
SFR 90
SFR A0
SFR B0
DIO_EEX[1:0] 2008[7:6]
DIO_PV
DIO_PW
DIO_PX
DIO_PY
EEDATA[7:0]
EECTRL[7:0]
ECK_DIS
EQU[2:0]
EX_XFR
EX_RTC
EX_FWCOL
EX_PLL
2008[2]
2008[3]
200F[3]
200F[2]
SFR 9E
SFR 9F
2005[5]
2000[7:5]
2002[0]
2002[1]
2007[4]
2007[5]
71M6533/G/H and 71M6534/H Data Sheet
The value on the DIO pins. Pins configured as LCD will read zero. When written, changes
data on pins configured as outputs. Pins configured as LCD or input will ignore writes.
0
0
0
0
–
– R/W
–
–
DIO_0[7:0] corresponds to DIO7 through DIO1 and PB (PB is read on DIO_0[0]).
DIO_1[7:0] corresponds to DIO15 through DIO8. (DIO_1[4] corresponding to
DIO12 is only applicable to the 71M6534)
DIO_2[7:0] corresponds to DIO23 through DIO16. (DIO_2[4] corresponding to
DIO22 is only applicable to the 71M6534)
DIO_3[6:0] corresponds to DIO30 through DIO24. (DIO_3[4] corresponding to
DIO28 is only applicable to the 71M6534)
When set, converts DIO4 and DIO5 to interface with external EEPROM. DIO4 becomes
SDCK and DIO5 becomes bi-directional SDATA.
DIO_EEX[1:0] Function
0
0 R/W
00
Disable EEPROM interface
01
2-Wire EEPROM interface
10
3-Wire EEPROM interface
11
--not used--
0
0 R/W Causes VARPULSE to be output on DIO7.
0
0 R/W Causes WPULSE to be output on DIO6.
0
0 R/W Causes XPULSE to be output on DIO8.
0
0 R/W Causes YPULSE to be output on DIO9.
0
0 R/W Serial EEPROM interface data.
0
0 R/W Serial EEPROM interface control.
Emulator clock disable. When ECK_DIS = 1, the emulator clock is disabled.
0
0 R/W
If ECK_DIS is set, the emulator and programming devices will be unable to
erase or program the device.
0
0 R/W Specifies the power equation to be used by the CE.
0
0
Interrupt enable bits. These bits enable the XFER_BUSY, the RTC_1SEC, the
0
0
0
0
R/W
FirmWareCollision (FWCOL), and PLL interrupts. Note that if one of these interrupts is
to be enabled, its corresponding MPU EX enable must also be set. See Section 1.4.9
0
0
Interrupts for details.
Rev 2
85