71M6533 Datasheet, PDF (131/132 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS_6533_6534_004
71M6533/G/H and 71M6534/H Data Sheet
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
1.1
November 9, Changes and corrections:
2009
1) Stated < 0.1% for accuracy for both H and non-H parts over
2000:1 range on title page.
2) Added STOP and IDLE bits in description of PCOM SFR.
3) Consolidated spelling of RTCA_ADJ.
4) Added explanation for Figure 18.
5) Completely revised section 2.5.2 (Wake on Timer).
6) Improved description of hysteresis in Application Section (3.11).
7) Corrected bit range for CE_LCTN to CE_LCTN[7:0].
8) Corrected bit assignment for control of DIO56 – DIO58 (DIO_56[4]
and DIO_DIR56[7].
9) Added LCD_SEG19[ ] to Table 47.
10) Added text in Table 47 stating that registers RTC_SEC to
RTC_YR do not change at reset.
11) Specified Voltage LSB in CE Interface Description (for sag
detection).
12) Corrected formulae for RMS calculation below Table 56.
13) Updated package outline drawing.
14) Added text describing connection of a trace emulator to the
71M6534 in Section 3.13.
15) Clarified write delay that applies to the RTC_SEC and other RTC
registers in Section 1.4.3 and Table 47.
16) Added note describing firmware measures to be applied when
using UART1 in full-duplex mode.
1.0
March 6, 2009 First publication with changes with respect to the preliminary data
sheet (PDS) as follows:
1) Corrected reversed labels for Timer/Counter 1 and 2 in Table 22.
2) Updated Figure 7 (Interrupt structure).
3) Updated range for RTC_A from 1.9 PPM to 3.8 PPM.
4) Changed SLEEP mode current at 25°C to 0.7 µV and deleted
entry for typical SLEEP mode current over temperature.
5) Corrected bit enumeration for FLSH_PGADR[7:2].
6) Corrected various typographical errors (TRIMMT etc.).
7) Corrected entries under “Wk.” Column for GP0-GP7 in alphabetical
I/O RAM table.
8) Added explanation for hysteresis at the V1 pin in Applications
section.
9) Replaced graph showing system performance specification over
temperature with specification on accuracy of VREF
compensation.
10) Changed accuracy of VREF compensation over temperature to
±15 PPM/°C
11) Changed LSB values provided for temperature sensor.
12) Added minimum output level for VLC1 LCD voltage.
13) Removed access to I/O RAM from SPI Port description.
14) Updated numerous parameters in Electrical Specification
(temperature sensor, supply current for mission and battery
modes).
15) Corrected number of pre-boot cycles in Flash Memory Section.
16) Updated entries in I/O RAM table under “Wake” column.
17) Updated CE register tables.
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