71M6533 Datasheet, PDF (130/132 Pages) Teridian Semiconductor Corporation – Energy Meter IC

71M6533/G/H and 71M6534/H Data Sheet
FDS_6533_6534_004
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
precautions for switching between modes and factory programming
of the first 6 flash addresses..
12) Figure 25, Figure 26 and Figure 27: Corrected name for PSDI and
PSDO signals.
13) Section 2.5.2 Wake on Timer (page 66): Updated description.
14) Section 3.1 Connection of Sensors (CT, Resistive Shunt) (page
68): Added note concerning analog input pins requiring sensors
with low source impedance.
15) Section 4.12 MPU Firmware Library (page 77): Modified to indicate
demonstration source code provided.
16) Section 4.13 Crystal Oscillator (page 77): Updated caution about
rejecting electromagnetic interference.
17) Table 53 I/O RAM Map – Functional Order (page 79): Updated format
for Unused and NVRAM locations.
18) Section 5.3.4 Environment (page 96): Added comment concerning
importance of parameter dependence on CE code environment.
19) Section 5.3.7 CE Status and Control: (page 99) Updated description
of EXT_TEMP. Updated Table 58.
20) Section 5.3.8 CE Transfer Variables:
 (page 100) Updated Table 60.
 (page 102) Added VBAT_SUM_X to Table 62.
21) Section 5.3.12: Added CAL_ID location.
22) Section 1.1.1: Updated flow diagrams.
23) Added 71M6533G (256 KB).
24) Updated value for capacitor at XOUT (7 pF).
25) Added description of delay compensation in CE (1.3.6).
26) Added description of error bands for VREF in 3.5.1.
27) Replaced Accuracy with Trim Deviation in Ordering Information.
28) Added explanation on pulse generation to description of registers
WSUM_ACCUM and VSUM_ACCUM.
29) Corrected comment in I/O RAM Table for entry DIO_DIR1[7:5, 3:0] to
state “see DIO_PX and DIO_PY for special options for the DIO8 and
DIO9 outputs”.
30) Added comment in electrical specifications for Battery Monitor
stating that the LSB values do not include the 8-bit left shift at CE
input”.
31) In Section on Real-Time Clock (RTC), corrected maximum value for
RTCA_ADJ to 0x7F and corrected adjustment rage to ±15 ppm.
Added note: “The digital adjustment using PREG[16:0] and
QREG[1:0] is preferred over the analog adjustment using
RTCA_ADJ: The digital adjustment is more repeatable and has a
wider range”
32) Corrected entry for SPE in I/O RAM Table to state “Enables the SPI
Interface on pins SEG3 through SEG6”
33) In I/O RAM Table for entry TRIM[7:0]: Added TRIMT[7:0] to list of
fuses accessible with TRIM[7:0].
34) Corrected entry in I/O RAM Table on IE_XFER and IE_RTC:
Removed text stating that flags are cleared automatically.
35) Added entry in I/O RAM Table for WE: Write data is discarded.
36) Corrected formula for sag threshold in CE section.
37) Completely reworked the description of the SPI port.
130
Rev 2