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MAX1441 Datasheet, PDF (35/41 Pages) Maxim Integrated Products – Automotive, Two-Channel Proximity and Touch Sensor
Automotive, Two-Channel Proximity and
Touch Sensor
Special System Functions
Interrupt
The device supports interrupt through the Interrupt
Vector (IV) register and the Interrupt Control (IC) register.
The IV register allows the user program to set a preferred
vector location to any program memory address. The IV
register is fixed at 07FDh. Since the reset location can
also be at 0000h, the user program must take care of
any potential conflict between the reset and interrupt
vector function.
Interrupt Sources
Interrupt sources can be classified into two categories:
• Asynchronous interrupt
• Synchronous interrupt
The device supports the following asynchronous inter-
rupts:
• External interrupts
• Watchdog interrupt
• Timer interrupts
• AFE interrupts
All the other internal interrupts are synchronous inter-
rupts. Synchronous internal interrupt is directly routed to
the interrupt handler that can be recognized in one cycle.
Clock Generation
All functional units in the device are synchronized
to the system clock that is generated from the 20MHz
oscillator. The basic unit of time in the device is the sys-
tem clock period. All storage logic blocks are triggered
by the rising edge of the system clock.
Clock Sources
The internal clock circuitry generates the system clock
from an internal 5MHz, which is derived from the 20MHz
oscillator (Figure 4).
Each time-code execution must start or restart
(e.g., exiting stop mode), the following sequence occurs:
1) Remove clock gating of internal 5MHz.
2) Reset the warm-up counter.
3) Wait for Flash to power up (about 10Fs).
4) Allow the required warm-up delay of eight oscillator
cycles of the 5MHz input.
The only time 20MHz turns off is if the CPU is in stop
mode and AFE is in standby mode or powered down (PD
register = 6). During stop mode, if the AFE is in standby
mode, the oscillator is periodically turned off and on to
allow the AFE to sample inputs. This causes an interrupt
to the CPU if an enabled threshold condition is met.
POR
STOP
XDOG
STARTUP
TIMER
XDOG_DONE
20MHz
OSCILLATOR
/4
5MHz
FLASH
CONTROLLER
/4
1.25MHz
STOP
RESET
POR
SYSTEM SYSTEM
CLOCK CLOCK
GENERATION
Figure 4. Clock Sources
35