MAX1441 Datasheet, PDF (29/41 Pages) Maxim Integrated Products – Automotive, Two-Channel Proximity and Touch Sensor

Automotive, Two-Channel Proximity and
Touch Sensor
Table 11. Special-Function Register Bit Description (continued)
REGISTER
CRSLT1H (09h, 01h)
Initialization
Read/Write Access
CRSLT1H[7:0]
CRSLT2L (0Ah, 01h)
Initialization
Read/Write Access
DESCRIPTION
Channel 1 Conversion Result Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
This register is read-only.
Channel 1 Conversion Result Bits[11:4]. This register contains the upper 8 bits of the C–to–D
conversion.
Channel 2 Conversion Result Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
This register is read-only.
CRSLT2L.0–OVR2
CH2 Overrange Flag. The overrange flag is set to 1 by hardware if the current conversion causes
overranging of the C–to–D conversion. This bit is cleared to 0 if the current conversion does not cause
overranging.
CRSLT2L[3:0]
CRSLT2L[7:4]
CRSLT2H (0Bh, 01h)
Initialization
Read/Write Access
CRSLT2H[7:0]
AT1H (0Ch, 01h)
Initialization
Read/Write Access
Reserved. Read returns 0.
Channel 2 Conversion Result Bits [3:0]. This register contains the lower 4 bits of the C–to–D
conversion.
Channel 2 Conversion Result Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
This register is read only.
Channel 2 Conversion Result Bits [11:4]. This register contains the upper 8 bits of the C–to–D
conversion.
CH1 Absolute Wake-Up Threshold Register (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read/write.
AT1H[7:0]
CH1 Absolute Wake-Up Threshold Bits [11:4]. This register contains the threshold value against
which a wake-up event is generated in standby mode. This register has no effect if the absolute
threshold is not enabled.
RT1H (0Dh, 01h)
Initialization
Read/Write Access
CH1 Rate-of-Change Wake-Up Threshold Register (8-Bit Register)
This register is cleared to 0000h on all forms of reset.
Unrestricted read/write.
RT1H[7:0]
CH1 Rate-of-Change Wake-Up Threshold Bits [11:4]. This register contains the threshold value
against which a wake-up event is generated in standby mode. This register has no effect if the
rate-of-change threshold is not enabled.
AT2H (0Eh, 01h)
Initialization
Read/Write Access
CH2 Absolute Wake-Up Threshold Register (8-Bit Register)
This register is cleared to 0000h on all forms of reset.
Unrestricted read/write.
AT2H[7:0]
CH2 Absolute Wake-Up Threshold Bits [11:4]. This register contains the threshold value against
which a wake-up event is generated in standby mode. This register has no effect if the absolute
threshold is not enabled.
RT2H (0Fh, 01h)
Initialization
Read/Write Access
CH2 Rate-of-Change Wake-Up Threshold Register (8-Bit Register)
This register is cleared to 0000h on all forms of reset.
Unrestricted read/write.
RT2H[7:0]
CH2 Rate-of-Change Wake-Up Threshold Bits [11:4]. This register contains the threshold value
against which a wake-up event is generated in standby mode. This register has no effect if the
rate-of-change threshold is not enabled.
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