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MAX1441 Datasheet, PDF (13/41 Pages) Maxim Integrated Products – Automotive, Two-Channel Proximity and Touch Sensor
Automotive, Two-Channel Proximity and
Touch Sensor
Table 4. Special-Purpose Registers’ Reset Values
REGISTER
AP
APC
PSF
IC
IMR
SC
IIR
CKCN
WDCN
A0
A1
A2
A3
MSB
—
—
—
—
—
—
—
—
—
0000
0000
0000
0000
—
—
—
—
—
—
—
—
—
0000
0000
0000
0000
0000
0000
1000
0000
0000
1000
0000
1110
ss11
0000
0000
0000
0000
LSB
0000
0000
0000
0000
0000
00s0
0000
0000
0ss0
0000
0000
0000
0000
REGISTER
PFX
IP
SP
IV
LC0
LC1
DPC
GR
GRL
GRS
GRH
GRXL
DP0
MSB
0000
1000
0000
0000
0000
0000
0000
0000
—
0000
—
0000
0000
0000
0000
0000
0111
0000
0000
0000
0000
—
0000
—
0000
0000
0000
0000
0010
1111
0000
0000
0000
0000
0000
0000
0000
0000
0000
LSB
0000
0000
1111
1101
0000
0000
0100
0000
0000
0000
0000
0000
0000
Table 5. Special-Purpose Register Bit Description
REGISTER
AP (00h, 08h)
Initialization
Read/Write Access
DESCRIPTION
Accumulator Pointer (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read/write.
AP[1:0]
Active Accumulator Select Bits [1:0]. The setting of these bits activates one of the four accumulators
in the accumulator module (A) to function as the active accumulator for arithmetic and logical opera-
tions. The setting of these bits can be automatically incremented/decremented in a modulo fashion
according to the setting to the APC register.
AP[7:2]
APC (01h, 08h)
Initialization
Read/Write Access
APC[1:0]–MOD[1:0]
APC[5:2]
APC.6–IDS
Reserved. Read returns 0.
Accumulator Pointer Control (8-Bit Register)
This register is cleared to 00h on all forms of reset.
Unrestricted read/write.
Modulo Bits [1:0]. The accumulator pointer autoincrement/decrement function is activated when these
bits are set to a value other than 00b. The modulo is selected accordingly when active pointer autoincre-
ment/decrement is active.
MOD[1:0]
00
01
10
11
Reserved. Read returns 0.
MODULO
Default, no AP autoincrement/decrement
Modulo 2
Modulo 4
Reserved (modulo 4 if set)
Increment/Decrement Select. When this bit is cleared to 0, the content of AP increments after an arith-
metic or logical operation. When this bit is set to 1, the content of AP is decremented after arithmetic or
logical operation.
APC.7–CLR
AP Clear. When this bit is set to 1, the content of AP is cleared to 0. This bit automatically resets to 0
after clearing the AP register. Note if the MOVE APC, Acc instruction (980Ah) causes the CLR bit to set,
the clear operation overrides other functions (i.e., the AP autoincrement/decrement does not happen).
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