X9520_07 Datasheet, PDF (9/29 Pages) Intersil Corporation – Triple DCP, POR, 2kbit EEPROM Memory, Dual Voltage Monitors

X9520
terminal”. Therefore, the Data Byte 00001111 (15₁₀)
corresponds to setting the “wiper terminal” to tap position 15.
Similarly, the Data Byte 00011100 (28₁₀) corresponds to
setting the “wiper terminal” to tap position 28. The mapping
of the Data Byte to “wiper position” data for DCP1 (100 Tap),
is shown in “Appendix 1” . An example of a simple C
language function which “translates” between the tap
position (decimal) and the Data Byte (binary) for DCP1, is
given in “Appendix 2” .
It should be noted that all writes to any DCP of the X9520
are random in nature. Therefore, the Data Byte of
consecutive write operations to any DCP can differ by an
arbitrary number of bits. Also, setting the bits P1 = 1, P0 = 1
is a reserved sequence, and will result in no
ACKNOWLEDGE after sending an Instruction Byte on SDA.
The factory default setting of all “wiper position” settings is
with 00h stored in the NVM of the DCPs. This corresponds
to having the “wiper teminal” R_WX (x = 0,1,2) at the “lowest”
tap position, Therefore, the resistance between R_WX and
R_LX is a minimum (essentially only the Wiper Resistance,
R_W).
DCP Read Operation
A read of DCPx (x = 0,1,2) can be performed using the three
byte random read command sequence shown in Figure 10.
The master issues the START condition and the Slave
Address Byte 10101110 which specifies that a “dummy”
write” is to be conducted. This “dummy” write operation sets
which DCP is to be read (in the preceding Read operation).
An ACKNOWLEDGE is returned by the X9520 after the
Slave Address if received correctly. Next, an Instruction Byte
is issued on SDA. Bits P1-P0 of the Instruction Byte
determine which DCP “wiper position” is to be read. In this
case, the state of the WT bit is “don’t care”. If the Instruction
Byte format is valid, then another ACKNOWLEDGE is
returned by the X9520.
Following this ACKNOWLEDGE, the master immediately
issues another START condition and a valid Slave address
byte with the R/W bit set to 1. Then the X9520 issues an
ACKNOWLEDGE followed by Data Byte, and finally, the
master issues a STOP condition. The Data Byte read in this
operation, corresponds to the “wiper position” (value of the
WCR) of the DCP pointed to by bits P1 and P0.
Signals from the
Master
SDA Bus
Signals from the
Slave
WRITE Operation
READ Operation
S
S
t
a
Slave
r
Address
Instruction
Byte
t
Slave
a
Address
S
t
o
t
r
Data Byte
p
t
10101110
W
T
0
0
0
0
0
PP
10
10101111
A
A
A
C
C
C
K
K
K
“Dummy” write
FIGURE 10. DCP READ SEQUENCE
DCPx
--
x=0
-
x=1
MSB
x=2
LSB
“-” = DON’T CARE
Signals from the
Master
SDA Bus
Signals from the
Slave
S
t
WRITE Operation
a
r
Slave
t
Address
Address
Byte
Data
Byte
10100000
A
A
Internal _C
C
Device _K
K
Address
FIGURE 11. EEPROM BYTE WRITE SEQUENCE
S
t
o
p
A
C
K
9
FN8206.2
August 20, 2007