X9520_07 Datasheet, PDF (25/29 Pages) Intersil Corporation – Triple DCP, POR, 2kbit EEPROM Memory, Dual Voltage Monitors

X9520
V1/VCC, V2, V3
t_TSU
V_P
WP
SCL
SDA
t_VPS
V_TRIPx
t_wc
00h
NOTE : V1/VCC must be greater than V2, V3 when programming.
FIGURE 33. V_TRIPX PROGRAMMING TIMING DIAGRAM (X = 1,2,3)
t_THD
t_VPO
t_VPH
Rwx (x = 0,1,2)
R_wx(n)
R_wx(n+1)
R_wx(n-1)
t_wr
SCL
n = tap position
Time
SDA
S ^{1 0 1 0 1 1 1 0} A WT 0 0 0 0 0 P1 P0 A ^{D7 D6 D5 D4 D3 D2 D1 D0} A S
T
C
C
CT
A
K
K
KO
R
T
SLAVE ADDRESS BYTE
INSTRUCTION BYTE
DATA BYTE
P
FIGURE 34. DCP “WIPER POSITION” TIMING
25
FN8206.2
August 20, 2007