HMP8116 Datasheet, PDF (30/43 Pages) Intersil Corporation – NTSC/PAL Video Decoder

HMP8116
TABLE 21. VIDEO STATUS REGISTER
BIT
NO.
FUNCTION
SUB ADDRESS = 0E_H
DESCRIPTION
RESET
STATE
7
Vertical Lock
This bit is read-only. Data written to this bit is ignored.
0_B
Status
0 = Not vertically locked
1 = Vertically locked
6
Horizontal Lock
This bit is read-only. Data written to this bit is ignored.
0_B
Status
0 = Not horizontally locked
1 = Horizontally locked
5
Color Lock
This bit is read-only. Data written to this bit is ignored.
0_B
Status
0 = Not color locked
1 = Color locked
4
Input Video
This bit is read-only. Data written to this bit is ignored.
0_B
Detect Status
0 = Input video not detected on selected video input
1 = Input video detected on selected video input
3-1
Reserved
0
Auto Detect
Video Standard
Status
This bit is set when automatic detection of the video standard is enabled, and the
HMP8116 has determined the input format of the video signal. This bit is read-only. Data
written to this bit is ignored.
0 = Video standard not determined on selected video input
1 = Video standard determined on selected video input
000_B
0_B
TABLE 22. INTERRUPT MASK REGISTER
BIT
NO.
FUNCTION
SUB ADDRESS = 0F_H
DESCRIPTION
RESET
STATE
7
Genlock Loss
If this bit is a “1”, an interrupt is generated when genlock is lost.
0_B
Interrupt Mask
0 = Interrupt disabled
1 = Interrupt enabled
6
Input Signal Loss If this bit is a “1”, an interrupt is generated when a video signal is no longer detected on
0_B
Interrupt Mask
the selected video input.
0 = Interrupt disabled
1 = Interrupt enabled
5
Closed Caption
If this bit is a “1”, an interrupt is generated when the Caption_ODD_A and
0_B
Interrupt Mask
Caption_ODD_B or the Caption_EVEN_A and Caption_EVEN_B data registers contain
new data.
0 = Interrupt disabled
1 = Interrupt enabled
4
WSS
Interrupt Mask
If this bit is a “1”, an interrupt is generated when the WSS_ODD_A and WSS_ODD_B or
0_B
the WSS_EVEN_A and WSS_EVEN_B data registers contain new data.
0 = Interrupt disabled
1 = Interrupt enabled
3
Teletext
Interrupt Mask
If this bit is a “1”, an interrupt is generated when teletext information is first detected at the
0_B
beginning of each field.
0 = Interrupt disabled
1 = Interrupt enabled
2
Reserved
0_B
1
Auto Detect
If this bit is a “1”, an interrupt is generated when the video standard has been automati-
0_B
Video Standard
cally determined.
Interrupt Mask
0 = Interrupt disabled
1 = Interrupt enabled
0
Vertical Sync
If this bit is a “1”, an interrupt is generated at the beginning of each field.
0_B
Interrupt Mask
0 = Interrupt disabled
1 = Interrupt enabled
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