80960HA Datasheet, PDF (92/102 Pages) Intel Corporation – 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

80960HA/HD/HT
Example 1. Boundary-Scan Description Language (BSDL) for PGA Package Example (Sheet 7 of 8)
“35 (CBSC_1, D(25),
bidir, X, 17, 1, Z),” &
“36 (CBSC_1, D(26),
bidir, X, 17, 1, Z),” &
“37 (CBSC_1, D(27),
bidir, X, 17, 1, Z),” &
“38 (CBSC_1, D(28),
bidir, X, 17, 1, Z),” &
“39 (CBSC_1, D(29),
bidir, X, 17, 1, Z),” &
“40 (CBSC_1, D(30),
bidir, X, 17, 1, Z),” &
“41 (CBSC_1, D(31),
bidir, X, 17, 1, Z),” &
“42 (BC_4, BTERMBAR, input, X),” &
“43 (BC_4, READYBAR, input, X),” &
“44 (BC_4, HOLD,
input, X),” &
“45 (BC_1, HOLDA,
output3, X, 46, 1, Z),” &
“46 (BC_1, *,
control, 1),” &
“47 (BC_1, ADSBAR,
output3, X, 61, 1, Z),” &
“48 (BC_1, BEBAR(3), output3, X, 61, 1, Z),” &
“49 (BC_1, BEBAR(2), output3, X, 61, 1, Z),” &
“50 (BC_1, BEBAR(1), output3, X, 61, 1, Z),” &
“51 (BC_1, BEBAR(0), output3, X, 61, 1, Z),” &
“52 (BC_1, BLASTBAR, output3, X, 61, 1, Z),” &
“53 (BC_1, DENBAR,
output3, X, 61, 1, Z),” &
“54 (BC_1, WRBAR,
output3, X, 61, 1, Z),” &
“55 (BC_1, DTRBAR,
output3, X, 56, 1, Z),” &
“56 (BC_1, *,
control, 1),” &
“57 (BC_1, WAITBAR,
output3, X, 61, 1, Z),” &
“58 (BC_1, BSTALL,
output3, X, 6, 1, Z),” &
“59 (BC_1, DCBAR,
output3, X, 61, 1, Z),” &
“60 (BC_1, SUPBAR,
output3, X, 61, 1, Z),” &
“61 (BC_1, *,
control, 1),” &
“62 (BC_1, LOCKBAR,
output3, X, 61, 1, Z),” &
“63 (BC_1, BREQ,
output3, X, 6, 1, Z),” &
“64 (BC_1, A(31),
output3, X, 80, 1, Z),” &
“65 (BC_1, A(30),
output3, X, 80, 1, Z),” &
“66 (BC_1, A(29),
output3, X, 80, 1, Z),” &
“67 (BC_1, A(28),
output3, X, 80, 1, Z),” &
“68 (BC_1, A(27),
output3, X, 80, 1, Z),” &
“69 (BC_1, A(26),
output3, X, 80, 1, Z),” &
“70 (BC_1, A(25),
output3, X, 80, 1, Z),” &
“71 (BC_1, A(24),
output3, X, 80, 1, Z),” &
“72 (BC_1, A(23),
output3, X, 80, 1, Z),” &
“73 (BC_1, A(22),
output3, X, 80, 1, Z),” &
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