80960HA Datasheet, PDF (58/102 Pages) Intel Corporation – 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

80960HA/HD/HT
Figure 35. Burst, Non-Pipelined Read Request without Wait States, 32-Bit Bus
PMCON
Function
External
Ready
Control
Burst
Pipe-
Lining
Bus
Width
Odd Parity
Parity Enable
Bit 29
28
24
23-22
21
20
Value
Disabled Enabled
0
1
OFF
0
32-Bit
10
X Enabled
x
1
NOTE: Bits 31-30, 27-25, 13, and 5 are reserved.
N_XDA
19-16
0
0000
N_WDD
15-14
X
xx
N_WAD
12-8
X
xxxxx
N_RDD
7-6
0
00
N_RAD
4-0
0
00000
A
D
D
D
D
A
CLKIN
ADS
A31:4, SUP,
CT3:0,D/C,
BE3:0, LOCK
W/R
BLAST
Valid
DT/R
DEN
A3:2
WAIT
D31:0,
DP3:0
PCHK
00
01
10
11
In0
In1
In2
In3
52
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