80960HA Datasheet, PDF (62/102 Pages) Intel Corporation – 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

80960HA/HD/HT
Figure 39. Burst, Non-Pipelined Read Request with Wait States, 16-Bit Bus
PMCON
External
Function Ready Burst
Control
Pipe- Bus
Lining Width
Odd
Parity
Parity
Enable
N_XDA
Bit 29
28
24 23-22 21
20 19-16
Value
Disabled Enabled
0
1
OFF
0
16-Bit
01
X Enabled 1
x
1
0001
NOTE: Bits 31-30, 27-25, 13, and 5 are reserved.
A2 1
D
1D1
N_WDD
15-14
X
xx
N_WAD
12-8
X
xxxxx
D 1D
N_RDD
7-6
1
01
1
N_RAD
4-0
2
00010
A
CLKIN
ADS
SUP, CT3:0,
D/C, LOCK,
A31:4, BE3/BHE,
BE0/BLE
W/R
Valid
BLAST
DT/R
DEN
A3:2
BE1/A1
A3:2 = 00 or 10
A3:2 = 01 or 11
WAIT
D31:0,
DP3:0
PCHK
D15:0
A1=0
D15:0
A1=1
D15:0
A1=0
D15:0
A1=1
56
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