80960HA Datasheet, PDF (46/102 Pages) Intel Corporation – 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

80960HA/HD/HT
Figure 15. Hold Acknowledge Timings
CLKIN
1.5 V
1.5 V
1.5 V
HOLD
HOLDA
T_IH
Min
1.5 V
T_IS
T_IH
Min
Min
1.5 V
T_IS
Min
1.5 V
T_{OV1 Max}
T_OH1
Min
T_OV1 Max
T_OH1
Min
1.5 V
1.5 V
1.5 V
T_OV T_OH — OUTPUT DELAY - The maximum output delay is referred to as the Output Valid Delay (T_OV).
The minimum output delay is referred to as the Output Hold (T_OH).
T_IS T_IH — INPUT SETUP AND HOLD - The input setup and hold requirements specify the sampling window
during which synchronous inputs must be stable for correct processor operation.
Figure 16. Bus Backoff (BOFF) Timings
CLKIN
1.5 V
1.5 V
1.5 V
BOFF
T_IH
1.5 V
T_IS
T_IH
1.5 V
T_IS
1.5 V
40
Advance Information Datasheet