80960HA Datasheet, PDF (59/102 Pages) Intel Corporation – 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor

80960HA/HD/HT
Figure 36. Burst, Non-Pipelined Read Request with Wait States, 32-Bit Bus
PMCON
Function
Bit
External
Ready
Control
29
Burst
28
Value
Disabled Enabled
0
1
Pipe-
Lining
24
OFF
0
Bus
Width
23-22
32-Bit
10
Odd
Parity
Parity
Enable
N_XDA
21
20 19-16
X Enabled 1
x
1
0001
N_WDD
15-14
X
xx
N_WAD
12-8
X
xxxxx
N_RDD
7-6
1
01
NOTE: Bits 31-30, 27-25, 13, and 5 are reserved.
A2 1
D
1D1
D 1D 1
N_RAD
4-0
2
00010
A
CLKIN
ADS
A31:4, SUP,
CT3:0, D/C,
BE3:0, LOCK
W/R
BLAST
DT/R
Valid
DEN
A3:2
WAIT
D31:0,
DP3:0
00
01
10
11
In0
In1
In2
In3
PCHK
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