PD6710 Datasheet, PDF (85/138 Pages) Intel Corporation – ISA-to-PC-Card (PCMCIA) Controllers

ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
11.2
Bits 7:6 — Setup Prescalar Select
00
Npres = 1
01
Npres = 16
10
Npres = 256
11
Npres = 8192
This field chooses one of four prescalar values N_pres that are combined with the value of the Setup
Multiplier Value (bits 5:0) to control the length of setup time before a command becomes active.
Command Timing 0–1
Register Name: Command Timing 0–1
Index: 3Bh, 3Eh
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Register Per: socket
Register Compatibility Type: 365
Bit 1
Bit 0
Command Prescalar Select
Command Multiplier Value
RW:00
RW:000110/001111¹
1. Timing set 0 (index 3Bh) resets to 06h for socket timing equal to standard AT-bus-based cycle times. Timing set 1 (3Eh)
resets to 0Fh for socket timings equal to standard AT-bus timing using one additional wait state.
There are two separate Command Timing registers, each with identical fields. These registers are
located at the following indexes:
Index Command Timing
3Bh Command Timing 0
3Eh Command Timing 1
The Command Timing register for each timing set controls how long a PC Card cycle’s command
(that is, -OE, -WE, -IORD, -IOWR; see Table 2 on page 20) active time will be, in terms of the
number of internal clock cycles.
The overall command timing length C is programmed by selecting a 2-bit prescaling value (bits 7:6
of this register) representing weights of 1, 16, 256, or 8192, and then selecting a multiplier value
(bits 5:0) to which that prescalar is multiplied to produce the overall command timing length
according to the following formula:
C = (N_pres × N_val) + 1
The value of C, representing the number of internal clock cycles for a command, is then multiplied
by the internal clock’s period to determine the command active time (see “PC Card Bus Timing
Calculations” on page 109 for further discussion).
Datasheet
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