PD6710 Datasheet, PDF (42/138 Pages) Intel Corporation – ISA-to-PC-Card (PCMCIA) Controllers

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
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Figure 10. Device/Socket/Register Index Space
FFh
Possible with two PD67XXs
80h
7Fh
40h
3Fh
00h
Socket D Registers
Socket C Registers
Socket B Registers
Socket A Registers
When viewed as a 8-bit value, the contents of the Index register completely specify a single
internal-register byte. For example, when the value of this register is in the range 00h–3Fh, a
Socket A register is selected (Socket Index bit is ‘0’), and when the value of this register is in the
range 40h–7Fh, a Socket B register is selected (Socket Index bit is ‘1’). This register only reads
back for Device 0. Device 1 will read back only the upper data byte when 16-bit reads occur at
3E0h.
The internal register that is accessed when the CPU reads or writes the Data register is determined
by the current value of the Index register, as follows:
Table 11. Index Registers (Sheet 1 of 3)
Register Name
Index Value
Socket A
Socket B¹
Chip Revision
00h²
Interface Status
01h
41h
Power Control
02h
42h
Interrupt and General Control
03h
43h
Card Status Change
04h
44h
Management Interrupt Configuration
05h
45h
Mapping Enable
06h
46h
I/O Window Control
07h
47h
System I/O Map 0 Start Address Low
08h
48h
System I/O Map 0 Start Address High
09h
49h
System I/O Map 0 End Address Low
0Ah
4Ah
System I/O Map 0 End Address High
0Bh
4Bh
System I/O Map 1 Start Address Low
0Ch
4Ch
System I/O Map 1 Start Address High
0Dh
4Dh
System I/O Map 1 End Address Low
0Eh
4Eh
System I/O Map 1 End Address High
0Fh
4Fh
1. Socket B is available on the dual-socket PD6722.
2. This register affects both sockets (it is not specific to either socket).
3. These registers are not available on the PD6710.
Chapter
“Chip Control
Registers” on
page 46
“I/O Window
Mapping Registers”
on page 58
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Datasheet