PD6710 Datasheet, PDF (17/138 Pages) Intel Corporation – ISA-to-PC-Card (PCMCIA) Controllers

ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Table 1. ISA Bus Interface Pins (Sheet 2 of 4)
Pin Name
Description
MEMR*
MEMW*
REFRESH*
ALE
PWRGOOD
AEN
MEMCS16*
IOCS16*
IOCHRDY
Memory Read: This input indicates that a
host memory read cycle is occurring.
Connect to ISA signal MEMR*.
Memory Write: This input indicates that a
host memory write cycle is occurring.
Connect to ISA signal MEMW*.
Refresh: This input indicates a memory
refresh cycle is occurring and will cause the
PD67XX to ignore memory accesses on the
bus. Connect to ISA signal REFRESH*.
Address Latch Enable: A high on this input
indicates a valid memory address on the
LA[23:17] bus lines. Connect to ISA signal
BALE.
Power Good: The PD67XX will be reset
when the POWERGOOD input is low.
Connect to the POWERGOOD signal from
the system power supply; or, if not available,
connect to inverted RESETDRV signal from
ISA bus.
Address Enable: This is an input from the
host CPU bus signal that distinguishes
between DMA and non-DMA bus cycles.
This input should be high for a DMA cycle
and will cause the PD67XX to ignore IOR*
and IOW* except when a PD6722 is
configured for DMA and its DREQ (IRQ10)
and DACK* (IRQ9) signals are active.
Connect to ISA signal AEN.
When PD67XX is in Suspend mode (see
“Misc Control 2” on page 72), pull this input
high during system power-down for lowest
power consumption.
Memory Select 16: This output is an
acknowledge of 16-bit-wide access support
and is generated by the PD67XX when a
valid 16-bit-word-accessible memory
address has been decoded. Connect to ISA
signal MEMCS16*.
I/O Select 16: This output is an
acknowledge for 16-bit-wide access support
and is generated by the PD67XX when a
valid 16-bit word accessible I/O address has
been decoded. Connect to ISA signal
IOCS16*.
I/O Channel Ready: This output is driven
low by the PD67XX to lengthen host cycles.
Connect to the ISA bus IOCHRDY signal.
Pin Number
PD6710
PD6722
83
145
82
144
119
180
105
166
141
201
126
187
99
160
97
158
127
188
Qty. I/O Pwr. Drive
1
I
4
–
1
I
4
–
1
I
4
–
1
I
4
–
1
I
4
–
1
I
4
–
1 O-OD 4 16 mA
1 O-OD 4 16 mA
1 O-TS 4 16 mA
Datasheet
17