82503 Datasheet, PDF (8/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)

82503
2 6 Mode Pins
Symbol
PLCC
Pin
TPE AUI
2
APORT
3
APOL XSQ
4
LID
38
CS0
5
CS1
8
LPBK
11
JABD
23
TEST
19
RESET
22
QFP
Pin
40
41
42
32
43
2
5
17
13
16
Type
IO
I
I
I
I
I
I
I
I
I
Name and Function
PORT SELECT TTL input LED output If APORT is low
TPE AUI is an input and selects either the TPE port (TPE AUI
high) or AUI port (TPE AUI low) If APORT is high the 82503 will
indicate the port selected by driving TPE AUI high (TPE) or low
(AUI) TPE AUI can drive an LED pull-up
AUTOMATIC PORT SELECTION TTL input When high 82503
will automatically select TPE or AUI port based on presence of
valid link beats or frames on the TPE receive input Mode
selected will be indicated on TPE AUI
AUTOMATIC POLARITY CORRECTION EXTENDED
SQUELCH ENABLE TTL input When high the extended
squelch mode is disabled and automatic polarity correction is
enabled Both junctions (APOL and XSQ) are enabled when this
pin is at a high impedance state When low both functions
become disabled The presence of a polarity fault on the TPE
receive pair is indicated on POLED regardless of the state of
APOL
LINK INTEGRITY DISABLE TTL input If high link integrity
function is disabled If low link integrity function is enabled
CONTROLLER SELECT Selects the appropriate interface for
the desired Ethernet controller When CS0 1 ^e 0 0 supports
Intel controllers When CS0 1 ^e 0 1 supports Fujitsu
controllers When CS0 1 ^e 1 0 supports Western Digital and
National controllers When CS0 1 ^e 1 1 supports AMD
controllers (See Table 2 )
LOOPBACK TTL input An active low input signal that causes
the 82503 to enter diagnostic loopback mode The twisted pair
or AUI medium will be removed from the circuit thus isolating
the node from the network When not connected this pin
assumes the inactive (high) state Diagnostic loopback does not
disable the operation of the link integrity processor link beat
generator or automatic port selection
JABBER DISABLE TTL input When high this pin disables the
jabber function When low the jabber function is enabled and
the device performs AUI or TP jabber protection for the active
port If this pin and TEST are asserted during a falling edge of
RESET the 82503 enters its low power mode when either this
pin or TEST deasserts then the 82503 transitions to its normal
operating mode
TEST MODE ENABLE TTL input When TEST is high and
RESET is deasserted a customer test mode is directly
accessed When driven low test mode is disabled If this pin and
JABD are asserted during a falling edge of RESET the 82503
enters its low power mode when either this pin or JABD
deasserts then the 82503 transitions to its normal operating
mode
RESET TTL input When high resets internal circuitry On the
falling edge of RESET either test mode or low power mode can
be entered depending on the state of JABD and TEST
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