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82503 Datasheet, PDF (6/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)
82503
2 1 Power Pins
Symbol
PLCC
Pin
VSS(1)
VCC(1)
VCCA(1)
VSSA(1)
7 17 39
6 18 40
28
29
QFP
Pin
1 11 33
44 12 34
22
23
Type
Supply
Supply
Supply
Supply
Name and Function
Digital Ground
Digital VCC A 5-V g 5% Power Supply
Analog VCC A 5-V g 5% Power Supply
Analog Ground
NOTE
1 VCC and VCCA must be connected to the same power supply VSS and VSSA must be connected to the same ground
Separate decoupling and noise conditioning (e g ferrite beads) should be used
2 2 Clock Pins
Symbol
PLCC
Pin
QFP
Pin
X1
21
15
X2
20
14
Type
I
O
Name and Function
CLOCK CRYSTAL A 20 MHz crystal input This pin can be driven
with an external MOS level clock when X2 is left floating
CLOCK CRYSTAL A 20 MHz crystal output X1 can be driven with
an external MOS level clock when this pin is left floating
2 3 AUI Pins
Symbol
PLCC
Pin
TRMT
27
TRMT
26
RCV
31
RCV
30
CLSN
25
CLSN
24
QFP
Pin
21
20
25
24
19
18
Type
O
O
I
I
I
I
Name and Function
TRANSMIT PAIR A differential output driver pair that drives the
transmit pair of the transceiver cable The output bit stream is
Manchester encoded Following the last transition which is positive
at TRMT the differential voltage is reduced to zero volts
RECEIVE PAIR A differentially driven input pair which is tied to the
receive pair of the Ethernet transceiver cable The first transition on
RCV is negative-going to indicate the beginning of the frame The
last transition is positive-going to indicate the end of the frame The
received bit stream is assumed to be Manchester encoded
COLLISION PAIR A differentially driven input pair tied to the
collision presence pair of the Ethernet transceiver cable The
collision presence signal is a 10 MHz square wave The first
transition at CLSN is negative-going to indicate the beginning of the
signal the last transition is positive-going to indicate the end of the
signal
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