82503 Datasheet, PDF (20/45 Pages) Intel Corporation – DUAL SERIAL TRANSCEIVER (DST)

82503
7 0 ELECTRICAL SPECIFICATIONS
AND TIMINGS
ABSOLUTE MAXIMUM RATINGS
Case Temperature Under Bias
Storage Temperature
All Output and Supply Voltages
All Input Voltages
0 C to ^a85 C
b_{65 C to} a_{140 C}
b_{0 5V to} a_7V
b_{1 0V to} a_{6 0V}(1)
NOTICE This is a production data sheet The specifi-
cations are subject to change without notice
WARNING Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage
These are stress ratings only Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability
DC CHARACTERISTICS (T_C ^e 0 C to ^a85 C V_CC ^e 5V g5% V_CCA ^e 5V g5%)
Symbol
Parameter
Min
Max Units
Test Conditions
V_IL(TTL)⁽²⁾
V_IH(TTL)⁽²⁾
I_LI(2)
V_OL(MOS)⁽³⁾
Input Low Voltage
Input High Voltage
Input Leakage Current
Output Low Voltage
b0 3
20
08
V_CC
g 10
0 45
V
V
mA 0 0V ^s V_I ^s V_CC RESET e 1
V
I_OL e 4 mA
V_OH(MOS)
V_OL(LED)⁽⁴⁾
Output High Voltage
Output Low Voltage
39
V
I_OH e b500 mA
0 45
V
I_OL e 10 mA
V_OH(LED)
Output High Voltage
39
V
I_OH e b500 mA
I_LP
Leakage Current Low
Power Mode⁽⁵⁾
g 10
mA 0 0V ^s V_I ^s V_CC
R_DIFF
Input Differential Resistance⁽⁶⁾
10
kX dc
V_IDF(TPE)⁽⁷⁾ Input Differential Accept
g0 500 g3 1
V_P 5 MHz ^s f ^s 10 MHz
Input Differential Reject
g0 300 V_P
Input Differential Accept (XSQ) (Note 8) g3 1
V_P
Input Differential Reject (XSQ)
g0 180 V_P
R_S(TPE)⁽⁸⁾
Output Source Resistance
6
13
l l ^X
I_LOAD e 25 mA
V_IDF(AUI)⁽⁹⁾
Input Differential Accept
Input Differential Reject
g0 300 g1 5
V_P
g0 160 V_P
V_ODF(AUI)⁽¹⁰⁾ Output Differential Voltage
g0 450 g1 20
V
NOTES
1 The voltage levels for RCV CLSN and RD pairs are b0 75V to a8 5V
2 TTL Input Pins TxD RTS TPE AUI APORT APOL XSQ LID CS0 CS1 LPBK JABD TEST RESET
3 MOS Output Pins TxC RxD RxC CRS CDT
4 LED Pins TPE AUI TxLED RxLED COLED POLED LILED V_OL measured 10 ns after falling edge of TxC
5 Pins APORT APOL XSQ LID TPE AUI POLED LILED RTS LPBK RxD TxD CRS
CDT CS0 CS1 JABD TEST and RESET
6 Pins RD to RD RCV to RCV and CLSN to CLSN
7 TPE Input Pins RD and RD See Section 3 3 4 and Section 3 3 5
8 Typically it is b4 5 dB below normal squelch level
9 TPE Output Pins TDH TDH TDL and TDL R_S measures V_CC or V_SS to Pin
10 AUI Input Pins RCV and CLSN pairs
11 AUI Output Pins TRMT pair
20